Data Sheet #: SG082

Page 3 of 16

Rev: 00

Date: 06/17/05

© Copyright 2005 The Connor-Winfield Corp.

NOTES:

1.0

Operation of the device at these or any other condition beyond those listed under Operating Specifications is not implied.

Exposure to Absolute Maximum Rating conditions for extended periods of time may affect device reliability.

2.0

Requires external regulation and supply decoupling. (22 uF, 330 pF)

3.0

3db loop response.

4.0

50-ohm load biased to 1.3 volts.

5.0

Entry into Free Run doesn’t meet requirement for initial 2.33 seconds of self-timing.

6.0

The wider bandwidth of this model may result in a break in the GR-253-CORE, R5-135 Switching Mask for observation times of <50ms

7.0

Under rapidly changing input conditions. (-11ppm to +11ppm)

Operating Specifications

Table 2

Symbol

Parameter

Minimum

Nominal

Maximum

Units

Notes

R

IN

Input Reference Frequency (CMOS)

-

8

-

kHz

f

OUT

Output Frequency (LVPECL)

-

155.52

-

MHz

V

cc

Power Supply Voltage

3.135

3.3

3.465

Volts

2.0

I

cc

Power Supply Current

-

250

300

mA

5.0

T

o

Temperature Range

0

-

70

°C

F

fr

Free Run Frequency Range

-20

-

20

ppm

Φ

gain

Phase Gain

-

-

0.2

dB@~0.1Hz

F

cap

Capture/pull-in range

-25

-

25

ppm

F

bw

Jitter Filter Bandwidth

27

-

64

Hz

3.0

t

jtol

Input Jitter Tolerance

31.25

-

-

µs

8 kHz Ref. units

(Input Jitter Frequencies

≥ 10 Hz)

t

aq

Typical Acquisition Time Data

Acquisition from a cold power-up:

Phase lock within 12ns:

<3

sec.

Phase lock settled:

<3

sec.

Alarm time:

<1

sec.

Acquisition from Free Run:

Phase lock within 12ns:

<3

sec.

Phase lock settled:

<3

sec.

Alarm time:

1

sec.

Frequency lock with a 20PPM reference frequency step: Typically 30ms.

Phase lock during a switch between equal frequency references: Typically 0.1s, no alarm should be issued

t

rf

Output Rise and Fall Time (20% 80%)

100

225

350

ps

4.0

DC

Output Duty Cycle

40

50

60

%

MTIE

sr

MTIE at Synchronization Rearrangement

GR-253-CORE.1999 R5-135

5.0,6.0

Dynamic Offset Range (0°- 70°)

-

-

20

ns

Dynamic Offset Range (25°- 70°)

-

-

13

ns

Unit to Unit Phase Differential

-

-

100

ns

7.0

Output Jitter Specifications

Table 3

Jitter BW 10 Hz - 1 MHz

SONET Jitter BW 12 kHz - 20 MHz

Frequency (MHz)

pS (RMS)

m UI

pS (RMS)

m UI

155.52

20 Typ.

3.110 Typ.

1 Max.

0.156 Max.