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MAX5158EEE Datasheet(PDF) 5 Page - Maxim Integrated Products |
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MAX5158EEE Datasheet(HTML) 5 Page - Maxim Integrated Products |
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5 / 16 page ![]() Low-Power, Dual, 10-Bit, Voltage-Output DACs with Serial Interface _______________________________________________________________________________________ 5 Note 5: Accuracy is specified from code 3 to code 1023. Note 6: Accuracy is better than 1LSB for VOUT greater than 6mV and less than VDD - 80mV. Guaranteed by PSRR test at the end points. Note 7: Digital inputs are set to either VDD or DGND, code = 0000 hex, RL = ∞. ELECTRICAL CHARACTERISTICS—MAX5159 (continued) (VDD = +2.7V to +3.6V, VREFA = VREFB = 1.25V, RL = 10kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C (OS_ pins tied to AGND for a gain of +2V/V).) (Note 4) (Note 7) (Note 7) ns 40 tCL SCLK Pulse Width Low CONDITIONS ns 40 tCH SCLK Pulse Width High ns 100 tCP SCLK Clock Period µA ±1 Reference Current in Shutdown µA 1 8 IDD(SHDN) Power-Supply Current in Shutdown mA 0.5 0.6 IDD Power-Supply Current V 2.7 3.6 VDD Positive Supply Voltage ns 50 tDS SDI Setup Time ns 0 tCSH SCLK Rise to CS Rise Hold Time ns 40 tCSS CS Fall to SCLK Rise Setup Time CLOAD = 200pF CLOAD = 200pF ns 120 UNITS MIN TYP MAX SYMBOL PARAMETER tDO2 SCLK Fall to DOUT Valid Propagation Delay ns 120 tDO1 SCLK Rise to DOUT Valid Propagation Delay ns 0 tDH SDI Hold Time ns 100 tCSW CS Pulse Width High ns 40 tCS1 CS Rise to SCLK Rise Hold ns 10 tCS0 SCLK Rise to CS Fall Delay POWER SUPPLIES TIMING CHARACTERISTICS |
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