MAX5413 datasheet(3/11 Pages) MAXIM

3 / 11 page

Dual, 256-Tap, Low-Drift, Digital Potentiometers

in 14-Pin TSSOP

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ELECTRICAL CHARACTERISTICS (continued)

(VDD = +5V, unless otherwise noted. VH = VDD, VL = 0, TA = TMIN to TMAX. Typical values are at VDD = +5V, TA = +25°C,

unless otherwise noted.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

DIGITAL INPUTS

Input High Voltage

VIH

0.7 x VDD

Input Low Voltage

VIL

0.3 x VDD

Input Leakage Current

±1.0

µA

Input Capacitance

5pF

TIMING CHARACTERISTICS (ANALOG)

MAX5413

100

MAX5414

325

Wiper-Settling Time

MAX5415

650

TIMING CHARACTERISTICS (DIGITAL) (Note 5)

Maximum SCLK Frequency

MHz

SCLK Clock Period

tCP

100

SCLK Pulse Width High

tCH

SCLK Pulse Width Low

tCL

CS Fall to SCLK Rise Setup Time

tCSS

SCLK Rise to

CS Rise Hold Time

tCSH

0ns

DIN Setup Time

tDS

DIN Hold Time

tDH

0ns

SCLK Rise to

CS Fall Delay

tCS0

CS Rise to SCLK Rise Hold

tCS1

CS Pulse Width High

tCSW

100

POWER SUPPLIES

Supply Voltage

VDD

2.7

5.5

VDD = +5V

0.8

µA

Supply Current

IDD

CS = SCLK = DIN = VDD

VDD = +2.7V

0.1

µA

Note 1: Linearity is defined in terms of the HX to LX code-dependent resistance.

Note 2: The DNL and INL are measured with the potentiometer configured as a voltage-divider with HX = VDD and LX = 0. The wiper

terminal is unloaded and measured with an ideal voltmeter.

Note 3: The DNL and INL are measured with the potentiometer configured as a variable resistor. HX is unconnected and LX = 0. At

VDD = +5V, the wiper terminal is driven with a source current of 400µA for the 10k

Ω configuration, 80µA for the 50kΩ config-

uration, and 40µA for the 100k

Ω configuration. At VDD = +3V, 200µA/40µA/20µA for 10kΩ/50kΩ/100kΩ configurations,

respectively.

Note 4: The wiper resistance is the worst value measured by injecting into WX, a current IW = VDD / RHL.

Note 5: Digital timing is guaranteed by design.

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