MAX555 datasheet(2/12 Pages) MAXIM

2 / 12 page

300Msps, 12-Bit DAC with

Complementary Voltage Outputs

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ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(AVEE = DVEE = -5.2V, VREF = 1.000V, TMIN to TMAX = 0°C to +70°C, unless otherwise noted.) (Note 2.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

Note 1: Typical thermal resistance, junction-to-case R

θJC = 28°C/W. See Package Information.

Analog Supply Voltage (AVEE) .................................-7V to +0.3V

Digital Supply Voltage (DVEE) ..................................-7V to +0.3V

Digital Input Voltage (D0–D11) ...................................-5.5V to 0V

Reference Input Voltage (VIN) .................................0V to +1.25V

Reference Input Current....................................0mA to +1.56mA

Output Compliance Voltage (VOC)......................-1.25V to +1.0V

Output Common-Mode Voltage (VCM) ................-0.25V to +1.0V

Continuous Power Dissipation (TA = +70°C)

(without additional heatsink) ..............................................1.3W

Operating Temperature Range...............................0°C to +70°C

Junction Temperature Range (Note 1) .................0°C to +150°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10sec) .............................+300°C

VREF = 1.000V, current out, into

virtual ground, end-point linearity

Major carry, TA = +25°C

10% to 90%, TA = +25°C

90% to 10%, TA = +25°C

VREF = 1.000V, voltage out, VOUT/VIN (Note 3)

±0.024% FSR, 1LSB change

D0–D11 = logic 1, VREF = 1.000V,

measured at VOUT

±0.1% FSR

CONDITIONS

Settling Time

% Full

Scale

-0.05

±0.01

0.05

DLE2

Differential Linearity Error

-0.012

±0.003

0.012

DLE1

pVs

5.6

Glitch Energy

450

tRISE

Rise Time

510

tFALL

Fall Time

% Full

Scale

-1.0

±0.2

1.0

Absolute Gain Error

Guaranteed

12-Bit Monotonicity

µA

100

IOS

Output Offset Current

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

VOUT

VREF = 1.000V, current out, into

virtual ground, end-point linearity

VOUT

% Full

Scale

-0.05

±0.01

0.05

ILE2

Integral Linearity Error

VOUT

-0.012

±0.006

0.012

ILE1

D0–D11 = logic 0, VREF = 0V,

measured at VOUT

µA

350

ILEAK

Output Leakage Current

fOUT = 5MHz, fCLK = 50MHz

fOUT = 20MHz, fCLK = 100MHz

fOUT = 10MHz, fCLK = 50MHz

fOUT = 30MHz, fCLK = 200MHz

fOUT = 30MHz, fCLK = 100MHz

fOUT = 40MHz, fCLK = 200MHz

dBc

fOUT = 40MHz, fCLK = 250MHz

fOUT = 40MHz, fCLK = 300MHz

fOUT = 50MHz, fCLK = 250MHz

fOUT = 50MHz, fCLK = 300MHz

Spurious-Free Dynamic Range

√Hz

Bits 0–11 high, TA = +25°C

10.6

Output Noise

DC ACCURACY

TIME-DOMAIN PERFORMANCE (Note 4)

DYNAMIC PERFORMANCE (Notes 4, 5)

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