9DB433 datasheet(1/17 Pages) IDT

Part #	9DB433

Description	Spread Spectrum Compatible

PDF	17 Pages

Scroll/Zoom	100%

Manufacturer	IDT [Integrated Device Technology]

Direct Link	http://www.idt.com

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1 / 17 page

DATASHEET

FOUR OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1,2,3

9DB433

IDT®

FOUR OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1,2,3

1

9DB433

REV G 08/25/15

General Description

The 9DB433 zero-delay buffer supports PCIe Gen3

requirements, while being backwards compatible to PCIe

Gen2 and Gen1. The 9DB433 is driven by a differential

SRC output pair from an IDT 932S421 or 932SQ420 or

equivalent main clock generator.

Recommended Application

4 output PCIe Gen1,2,3 zero-delay/fanout buffer

Key Specifications

• Output cycle-cycle jitter <50ps

• Output to Output skew <50ps

• Phase jitter: PCIe Gen3 <1.0ps rms

Features/Benefits

• 3 Selectable SMBus Addresses; Mulitple devices can

share the same SMBus Segment

• OE# pins; Suitable for Express Card applications

• PLL or bypass mode; PLL can dejitter incoming clock

• Selectable PLL bandwidth; minimizes jitter peaking in

downstream PLL's

• Spread Spectrum Compatible; tracks spreading input

clock for low EMI

• SMBus Interface; unused outputs can be disabled

• Supports undriven differential outputs in Power Down

mode for power management

Output Features

• 4 - 0.7V current-mode differential HCSL output pairs

• Supports zero delay buffer mode and fanout mode

• Selectable bandwidth

• 50-110 MHz operation in PLL mode

• 5-166 MHz operation in Bypass mode

Functional Block Diagram

STOP

LOGIC

SRC_IN

SRC_IN#

DIF(6,5,2,1)

CONTROL

LOGIC

BYP#_LOBW_HIBW

SMBDAT

SMBCLK

PD#

SPREAD

COMPATIBLE

PLL

4

IREF

M

U

X

OE(6,1)#

2

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