DRV8701 datasheet(28/42 Pages) TI

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GH2

SH2

GL2

GL1

AVDD

DVDD

nFAULT

SNSOUT

IDRIVE

GND

(PPAD)

0.1 µF

Bulk

1 µF

0.1 µF

33 k

10 k

1 µF

50 m

BDC

DRV8701

SLVSCX5B – MARCH 2015 – REVISED JULY 2015

www.ti.com

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

The DRV8701 is used in brushed-DC, solenoid, or relay control.

8.2 Typical Applications

8.2.1 Brushed-DC Motor Control

The following design procedure can be used to configure the DRV8701.

Figure 34. Typical Application Schematic

8.2.1.1 Design Requirements

Table 10 gives design input parameters for system design.

Table 10. Design Parameters

Design Parameter

Reference

Example Value

Nominal supply voltage

18 V

Supply voltage range

VMMIN, VMMAX

12 to 24 V

FET total gate charge(1)

14 nC (typically)

FET gate-to-drain charge(1)

QGD

2.3 nC (typically)

Target FET gate rise time

100 to 300 ns

Motor current chopping level

ICHOP

3 A

(1)

FET part number is CSD88537ND.

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