CHA2190

20-30GHz Low Noise Amplifier

Ref : DSCHA21902036 -05-Feb.-02

8/8

Specifications subject to change without notice

Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE

Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09

Internal DC schematic

This chip is self-biased, and flexibility is provided by the access to positive Vg.

The internal DC electrical schematic is given in order to use these pads in a safe way.

Absolute recommandations:

N°1: Do not exceed Vds = 3.5 Volt (Vds: internal Dr ain to Source voltage).

N°2: Do not bias in such a way that Vgs* becomes po sitive. (Vgs: internal Gate to Source

voltage)

Typical biasing table and typical results in test Jig at 40 GHz

Ordering Information

Chip form

:

CHA2190-99F/00

Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors

S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of

patents or other rights of third parties which may result from its use. No license is granted by implication or

otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications

mentioned in this publication are subject to change without notice. This publication supersedes and replaces all

information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use

as critical components in life support devices or systems without express written approval from United

Monolithic Semiconductors S.A.S.

40GHzINTESTJig

Vds(V) Vg1(V) Vg2(V) Id(mA) Typical NF(dB) Typical Gain(dB) Typical P-1dB(dB) Typical Psat(dB)

Standard

4

NC

NC

50

2.2

15

11

13

LowNoiseHighlinearity

4.5

NC

1

60

2.2

15

12

14

Lownoise/lowcurrentconsumption

4

NC

-1

40

2.2

15

9.5

12

Switchoff

3.5

-1

-8

0

X

X

X

X