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LM5001MA/NOPB Datasheet(PDF) 18 Page - Texas Instruments |
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LM5001MA/NOPB Datasheet(HTML) 18 Page - Texas Instruments |
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18 / 26 page ![]() LM5001, LM5001-Q1 SNVS484H – JANUARY 2007 – REVISED JULY 2015 www.ti.com 9 Layout 9.1 Layout Guidelines The LM5001 Current Sense and PWM comparators are very fast and may respond to short duration noise pulses. The components at the SW, COMP, EN and the RT pins should be as physically close as possible to the IC, thereby minimizing noise pickup on the PC board tracks. The SW output pin of the LM5001 should have a short, wide conductor to the power path inductors, transformers and capacitors in order to minimize parasitic inductance that reduces efficiency and increases conducted and radiated noise. Ceramic decoupling capacitors are recommended between the VIN pin to the GND pin and between the VCC pin to the GND pin. Use short, direct connections to avoid clock jitter due to ground voltage differentials. Small package surface mount X7R or X5R capacitors are preferred for high frequency performance and limited variation over temperature and applied voltage. If an application using the LM5001 produces high junction temperatures during normal operation, multiple vias from the GND pin to a PC board ground plane helps conduct heat away from the IC. Judicious positioning of the PC board within the end product, along with use of any available air flow helps reduce the junction temperatures. If using forced air cooling, avoid placing the LM5001 in the airflow shadow of large components, such as input capacitors, inductors or transformers. 18 Submit Documentation Feedback Copyright © 2007–2015, Texas Instruments Incorporated Product Folder Links: LM5001 LM5001-Q1 |
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