AM3359_15 datasheet(3/248 Pages) TI

3 / 248 page

AM3359, AM3358, AM3357, AM3356, AM3354, AM3352

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SPRS717H – OCTOBER 2011 – REVISED MAY 2015

•

Fully Virtualized Memory Addressing for OS

– Up to Three 32-Bit Enhanced Quadrature

Operation in a Unified Memory Architecture

Encoder Pulse (eQEP) Modules

– LCD Controller

• Device Identification

– Contains Electrical Fuse Farm (FuseFarm) of

•

Up to 24-Bit Data Output; 8 Bits per Pixel

Which Some Bits are Factory Programmable

(RGB)

•

Production ID

•

Resolution up to 2048 × 2048 (With

Maximum 126-MHz Pixel Clock)

•

Device Part Number (Unique JTAG ID)

•

Integrated LCD Interface Display Driver

•

Device Revision (Readable by Host ARM)

(LIDD) Controller

• Debug Interface Support

•

Integrated Raster Controller

– JTAG and cJTAG for ARM (Cortex-A8 and

•

Integrated DMA Engine to Pull Data from the

PRCM), PRU-ICSS Debug

External Frame Buffer Without Burdening the

– Supports Device Boundary Scan

Processor via Interrupts or a Firmware Timer

– Supports IEEE 1500

•

512-Word Deep Internal FIFO

• DMA

•

Supported Display Types:

– On-Chip Enhanced DMA Controller (EDMA) has

–

Character Displays - Uses LIDD

Three Third-Party Transfer Controllers (TPTCs)

Controller to Program these Displays

and One Third-Party Channel Controller

–

Passive Matrix LCD Displays - Uses LCD

(TPCC), Which Supports up to 64

Raster Display Controller to Provide

Programmable Logical Channels and Eight

Timing and Data for Constant Graphics

QDMA Channels. EDMA is Used for:

Refresh to a Passive Display

•

Transfers to and from On-Chip Memories

–

Active Matrix LCD Displays - Uses

•

Transfers to and from External Storage

External Frame Buffer Space and the

(EMIF, GPMC, Slave Peripherals)

Internal DMA Engine to Drive Streaming

• Inter-Processor Communication (IPC)

Data to the Panel

– Integrates Hardware-Based Mailbox for IPC and

– 12-Bit Successive Approximation Register

Spinlock for Process Synchronization Between

(SAR) ADC

Cortex-A8, PRCM, and PRU-ICSS

•

200K Samples per Second

•

Mailbox Registers that Generate Interrupts

•

Input can be Selected from any of the Eight

–

Four Initiators (Cortex-A8, PRCM, PRU0,

Analog Inputs Multiplexed Through an 8:1

PRU1)

Analog Switch

•

Spinlock has 128 Software-Assigned Lock

•

Can be Configured to Operate as a 4-Wire,

Registers

5-Wire, or 8-Wire Resistive Touch Screen

• Security

Controller (TSC) Interface

– Crypto Hardware Accelerators (AES, SHA, PKA,

– Up to Three 32-Bit eCAP Modules

RNG)

•

Configurable as Three Capture Inputs or

• Boot Modes

Three Auxiliary PWM Outputs

– Boot Mode is Selected via Boot Configuration

– Up to Three Enhanced High-Resolution PWM

Pins Latched on the Rising Edge of the

Modules (eHRPWMs)

PWRONRSTn Reset Input Pin

•

Dedicated 16-Bit Time-Base Counter With

• Packages:

Time and Frequency Controls

– 298-Pin S-PBGA-N298 Via Channel Package

•

Configurable as Six Single-Ended, Six Dual-

(ZCE Suffix), 0.65-mm Ball Pitch

Edge Symmetric, or Three Dual-Edge

– 324-Pin S-PBGA-N324 Package

Asymmetric Outputs

(ZCZ Suffix), 0.80-mm Ball Pitch

1.2

Applications

•

Gaming Peripherals

•

Connected Vending Machines

•

Home and Industrial Automation

•

Weighing Scales

•

Consumer Medical Appliances

•

Educational Consoles

•

Printers

•

Advanced Toys

•

Smart Toll Systems

Device Overview

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Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352

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