6

The output of the watchdog timer (WDO) will remain

high if WDI sees a valid transition within the watchdog

timeout period or if WDI is left floating. If VCC falls

below the reset threshold voltage then WDO goes low

immediately regardless of WDI. Thus, if WDI is left

floating, then WDO can be used as a low line indicator.

Microprocessor Reset

The RESET pin is asserted whenever VCC falls below

the reset threshold voltage or when MR goes low. The

reset pin remains asserted for a period of 200ms after

VCC has risen above the reset threshold voltage and

MR goes high. The reset function ensures the

microprocessor is properly reset and powers up into a

known condition after a power failure. RESET will

remain valid with VCC as low as 1.4V.

Power Fail Warning

An additional comparator which is independent of other

functions on the MIC705/706/707/708 is provided for

early warning of power failure. An external voltage

divider can be used to compare unregulated DC to an

internal 1.25V reference. The voltage divider ratio on

the input of the power fail comparator (PFI) can be

chosen so as to trip the power fail comparator a few

milliseconds before VCC falls below the maximum reset

threshold voltage. The output of the power fail

comparator (PFO) can be used to interrupt the

microprocessor when used in this mode and execute

shut-down procedures prior to power loss.

Watchdog Timer

The microprocessor can be monitored by connecting

the WDI pin (watchdog input) to a bus line or I/O line. If

a transition doesn’t occur on the WDI pin within the

watchdog timeout period, then WDO will go low. A

minimum pulse of 50ns or any transition low-to-high or

high-to-low on the WDI pin will reset the watchdog timer.

+

-

1.25V

R1

R2

Unregulated DC

PFO

PFI

Figure 3. Power Fail Comparator

Circuit Description

Figure 4. Reset Timing Diagram

VCC

MR

RESET

WDO

MIC705/6/7/8

µP Supervisory Circuits