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LM48512 Datasheet(PDF) 3 Page - Texas Instruments |
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LM48512 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 22 page ![]() XYTT GN3 LM48512 www.ti.com SNAS497A – OCTOBER 2010 – REVISED APRIL 2012 16 – Bump micro SMD Markings Figure 3. Top View XY = Date Code TT = Die Traceability G = Boomer Family N3 = LM48512TL Pin Functions Pin Descriptions PIN NAME DESCRIPTION A1 PVDD Amplifier Power Supply Input. Connect to PVOUT. A2 PVOUT Boost Converter Output A3 SW Boost Converter Switching Node A4 PGND Boost Converter Power Ground B1 OUTA Non-Inverting Amplifier Output B2 GAIN Gain Select Input B3 RTRIP Boost Supply Threshold Voltage Set Pin B4 VDD Power Supply C1 OUTB Inverting Amplifier Output C2, D1 PGND Class D Power Ground C3 SDAMP Active Low Amplifier Shutdown Input. Connect to VDD for normal operation. C4 GND Ground D2 IN+ Non-Inverting Amplifier Input D3 IN- Inverting Amplifier Input D4 SDREG Active Low Boost Converter Shutdown Input. Connect to VDD for normal operation. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Copyright © 2010–2012, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM48512 |
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