3

ClockWorks™

SY89430V

Micrel

Symbol

Parameter

Value

Unit

Power Supply Voltage

–0.5 to +7.0

V

Input Voltage

–0.5 to +7.0

V

Output Source

Continuous

50

mA

Surge

100

Storage Temperature

–65 to +150

°C

Operating Temperature

–0 to +75

°C

NOTE:

1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at

conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended periods may

affect device reliability.

INPUTS

XTAL1, XTAL2

These pins form an oscillator when connected to an external

crystal. The crystal is series resonant.

This TTL pin loads the configuration latches with the contents

of the shift registers. The latches will be transparent when this

signal is HIGH; thus, the register data must be stable on the

This TTL pin is the input to the serial configuration shift

registers.

This TTL pin clocks the serial configuration shift registers. On

This TTL pin loads the configuration latches with the contents

of the parallel inputs. The latches will be transparent when this

signal is LOW; thus, the parallel data must be stable on the

M[8:0]

These TTL pins are used to configure the PLL loop divider.

M[8] is the MSB, M[0] is the LSB. The binary count on the M

pins equates to the divide-by value for the PLL.

N[1:0]

These TTL pins are used to configure the output divider

modulus. They are sampled on the LOW-to-HIGH transition

OUTPUTS

FOUT, FOUT

These differential positive-referenced ECL signals (PECL)

are the output of the synthesizer.

TEST

The function of this TTL output is determined by the serial

configuration bits T[2:0].

POWER

This is the positive supply for the chip and is normally

connected to +3.3V or +5.0V.

This is the positive reference for the PECL outputs, FOUT and

This is the positive supply for the PLL and should be as noise-

free as possible for low-jitter operation.

GND

These pins are the negative supply for the chip and are

normally all connected to ground.

OTHER

LOOP_FILTER

This is an analog I/O pin that provides the loop filter for the

PLL.

LOOP_REF

This is an analog I/O pin that provides a reference voltage for

the PLL.

PIN DESCRIPTIONS

N[1:0]

Output Division

0 0

2

0 1

4

1 0

8

1 1

1