LP3961, LP3964

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SNVS056J – MAY 2000 – REVISED JUNE 2015

Typical Applications (continued)

8.2.1 Design Requirements

DESIGN PARAMETERS

VALUE

Input voltage

5.3 V, ±10%

Output voltage

3.3 V, ±3%

Output current

800 mA (maximum)

Input capacitor

68 uF (minimum)

Output capacitor

33 uF (minimum)

ERROR pullup resistor (LP3964 only)

10 k

Ω

8.2.2 Detailed Design Procedure

8.2.2.1 External Capacitors

Like any low-dropout regulator, external capacitors are required to assure stability. these capacitors must be

correctly selected for proper performance.

8.2.2.1.1

Input Capacitor

The LP3961 or LP3964 requires a low source impedance to maintain regulator stability because the internal bias

circuitry is connected directly to the IN pin. The input capacitor must be located less than 1 cm from the LP3961

or LP3964 device and connected directly to the IN and GND pins using traces which have no other currents

flowing through them (see the Layout Guidelines section).

The minimum allowable input capacitance for a given application depends on the type of the capacitor and

equivalent series resistance (ESR). A lower ESR capacitor allows the use of less capacitance, while higher ESR

types (like aluminum electrolytics) require more capacitance.

The lowest value of input capacitance that can be used for stable full-load operation is 68 µF (assuming it is a

ceramic or low-ESR Tantalum with ESR less than 100 m

Ω).

To determine the minimum input capacitance amount and ESR value, an approximation is used:

(1)

This shows that input capacitors with higher ESR values can be used if sufficient total capacitance is provided.

Capacitor types (aluminum, ceramic, and tantalum) can be mixed in parallel, but the total equivalent input

capacitance/ESR must be defined as above to assure stable operation.

IMPORTANT: The input capacitor must maintain its ESR and capacitance in the stable range over the entire

temperature range of the application to assure stability (see the Capacitor Characteristics section).

8.2.2.1.2

Output Capacitor

An output capacitor is also required for loop stability. It must be located less than 1 cm from the LP3961 or

LP3964 device and connected directly to the OUT and GND pins using traces which have no other currents

flowing through them (see the Layout Guidelines section).

The minimum value of the output capacitance that can be used for stable full-load operation is 33 µF, but it may

be increased without limit. The ESR of the output capacitor is critical because it forms a zero to provide phase

lead which is required for loop stability. The ESR must fall within the specified range:

0.2

(2)

The lower limit of 200 m

Ω means that ceramic capacitors are not suitable for use as LP3961 or LP3964 output

capacitors (but can be used on the input). Some ceramic capacitance can be used on the output if the total

equivalent ESR is in the stable range: when using a 100-µF Tantalum as the output capacitor, approximately 3

µF of ceramic capacitance can be applied before stability becomes marginal.

IMPORTANT: The output capacitor must meet the requirements for minimum amount of capacitance and also

have an appropriate ESR value over the full temperature range of the application to assure stability (see the

Capacitor Characteristics section).

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