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TC1728 Datasheet(PDF) 95 Page - Infineon Technologies AG |
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TC1728 Datasheet(HTML) 95 Page - Infineon Technologies AG |
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95 / 130 page ![]() TC1728 Electrical Parameters Data Sheet 5-49 V1.2, 2014-06 • During power-up and power-down, the voltage difference between the power supply pins of the same voltage (3.3 V, 1.3 V, and 5 V) with different names, that are internally connected via diodes, must be lower than 100 mV. On the other hand, all power supply pins with the same name (for example all VDDP), are internally directly connected. It is recommended that the power pins of the same voltage are driven by a single power supply. • The PORST signal may be deactivated after all VDD5, VDDP, VDD, and VAREF0 power-supplies and the oscillator have reached stable operation, within the normal operating conditions. • At normal power down the PORST signal should be activated within the normal operating range, and then the power supplies may be switched off. Care must be taken that all Flash write or delete sequences have been completed. • At power fail the PORST signal must be activated at latest when any 3.3 V or 1.3 V power supply voltage falls 10% below the nominal level. If, under these conditions, the PORST is activated during a Flash write, only the memory row that was the target of the write at the moment of the power loss will contain unreliable content. In order to ensure clean power-down behavior, the PORST signal should be activated as close as possible to the normal operating voltage range. • In case of a power-loss at any power-supply, all power supplies must be powered- down, conforming at the same time to the rules number 2 and 4. • Although not necessary, it is additionally recommended that all power supplies are powered-up/down together in a controlled way, as tight to each other as possible. • Additionally, regarding the ADC reference voltage VAREF0: – VAREF0 must power-up at the same time or later then VDDM, and – VAREF0 must power-down either earlier or at latest to satisfy the condition VAREF0 < VDDM + 0.5 V. This is required in order to prevent discharge of VAREF0 filter capacitance through the ESD diodes through the VDDM power supply. In case of discharging the reference capacitance through the ESD diodes, the current must be lower than 5 mA. |
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