LC87F0N04A

No.A2055-2/19

Minimum Bus Cycle

100.0ns (10MHz at VDD=2.8V to 5.5V)

Note: The bus cycle time here refers to the ROM read speed.

 Ports

 Normal withstand voltage I/O ports

Ports I/O direction can be designated in 1 bit units

12(P00 to P03, P1n)

 Reset pin

1 (RES)

 On-chip Debugger pin

1 (OWP0)

 Power pins

2 (VSS, VDD)

Timers

Timer 0: 16-bit timer/counter with a capture register.

Mode 0: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register)

 2 channels

Mode 1: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register)

+ 8-bit counter (with an 8-bit capture register)

Mode 2: 16-bit timer with an 8-bit programmable prescaler (with a 16-bit capture register)

Mode 3: 16-bit counter (with a 16-bit capture register)

Timer 1: 16-bit timer/counter that supports PWM/toggle outputs

Mode 0: 8-bit timer with an 8-bit prescaler (with toggle outputs)

 2 channels

Mode 1: 8-bit PWM with an 8-bit prescaler

 2 channels

Mode 2: 16-bit timer/counter with an 8-bit prescaler (with toggle outputs)

(toggle outputs also possible from the lower-order 8 bits)

Mode 3: 16-bit timer with an 8-bit prescaler (with toggle outputs)

(The lower-order 8 bits can be used as PWM.)

Base timer

1) The clock is selectable from system clock, and timer 0 prescaler output.

2) Interrupts are programmable in 5 different time schemes

SIO

SIO1: 8-bit asynchronous/synchronous serial interface

Mode 0: Synchronous 8-bit serial I/O (2- or 3-wire configuration, 2 to 512 tCYC transfer clocks)

Mode 1: Asynchronous serial I/O (half-duplex, 8 data bits, 1 stop bit, 8 to 2048 tCYC baudrates)

Mode 2: Bus mode 1 (start bit, 8 data bits, 2 to 512 tCYC transfer clocks)

Mode 3: Bus mode 2 (start detect, 8 data bits, stop detect)

AD Converter: 10 bits/8 bits

 6 channels

10/8 bits AD converter resolution selectable

Auto start function (It links an interrupt factor of Motor control PWM)

Remote Control Receiver Circuit (sharing pins with P11, INT3)

Noise rejection function (noise filter time constant selectable from 1 tCYC, 32 tCYC, and 128 tCYC)

Clock Output Function

Can generate clock outputs with a frequency of 1/1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64 of the source clock selected as the

system clock.

Analog Comparator

 2 channels

Analog comparator Interrupt.

Analog comparator reference selectable (External input / Programmable on-chip voltage reference).

The voltage reference has 2 ranges with 16-level voltage levels in each range.

Rang1: CMP1vref1= (CMP1vref-Register<3:0> + 1 )/16

 VDD  0.64

CMP2vref2= (CMP2vref-Register<3:0> + 1 )/16

 VDD  0.64

Rang2: CMP1vref1= (CMP1vref-Register<3:0> + 1 )/64

 VDD  0.64

CMP2vref2= (CMP2vref-Register<3:0> + 1 )/64

 VDD  0.64

MCPWM2: Motor control 10bits PWM with Full-Bridge

Dead time is programmable.

Forced stop is possible by the output of the analog comparator and the INT terminals.

Edge-aligned / center-aligned selectable.