MT3170B/71B, MT3270B/71B, MT3370B/71B

4-4

Figure 2 - Pin Connections

Pin Description

Pin #

Name

Description

337xB

327xB

317xB

2

1

1

INPUT

DTMF/CP Input. Input signal must be AC coupled via capacitor.

42

-

OSC2

Oscillator Output.

63

3

OSC1

(CLK)

Oscillator/Clock Input. This pin can either be driven by:

1)

an external digital clock with defined input logic levels. OSC2

should be left open.

2)

connecting a crystal or ceramic resonator between OSC1 and

OSC2 pins.

94

4

Ground. (0V)

11

5

5

SD

Serial Data/Call Progress Output. This pin serves the dual function

of being the serial data output when clock pulses are applied after

validation of DTMF signal, and also indicates the cadence of call

progress input. As DTMF signal lies in the same frequency band as

call progress signal, this pin may toggle for DTMF input. The SD pin

is at logic low in powerdown state.

13

6

6

ACK

Acknowledge Pulse Input. After ESt or DStD is high, applying a

sequence of four pulses on this pin will then shift out four bits on the

SD pin, representing the decoded DTMF digit. The rising edge of the

first clock is used to latch the 4-bit data prior to shifting. This pin is

pulled down internally. The idle state of the ACK signal should be

low.

15

7

7

ESt

(MT3x70B)

DStD

(MT3x71B)

Early Steering Output. A logic high on ESt indicates that a DTMF

signal is present. ESt is at logic low in powerdown state.

Delayed Steering Output. A logic high on DStD indicates that a

valid DTMF digit has been detected. DStD is at logic low in

powerdown state.

18

8

8

Positive Power Supply (5V Typ.) Performance of the device can be

optimized by minimizing noise on the supply rails. Decoupling

1,5,7,8,

10, 12,

14,16,

17

--

NC

No Connection. Pin is unconnected internally.

3-

2

PWDN

Power Down Input. A logic high on this pin will power down the

device to reduce power consumption. This pin is pulled down

internally and can be left open if not used. ACK pin should be at logic

’0’ to power down device.

10

18

17

16

15

14

13

12

11

VDD

NC

NC

ESt/DStD

NC

ACK

NC

SD

NC

1

2

3

4

5

6

7

8

9

NC

INPUT

PWDN

OSC2

NC

OSC1

NC

NC

VSS

INPUT

PWDN

CLK

VSS

VDD

ACK

SD

INPUT

OSC2

OSC1

VSS

VDD

ESt/

ACK

SD

MT3170B/71B

MT3270B/71B

MT3370B/71B

8 PIN PLASTIC DIP

18 PIN PLASTIC SOIC

1

2

3

4

8

7

6

5

1

2

3

4

8

7

6

5

1

2

3

4

5

6

7

8

9

10

11

12

20

19

18

17

16

15

14

13

NC

NC

INPUT

PWDN

NC

NC

OSC1

OSC2

VSS

20 PIN SSOP

NC

VDD

NC

NC

ACK

SD

NC

NC

ESt/DStD

DStD

ESt/

DStD

MT3370B/71B

NC

NC