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MT8809AP Datasheet(PDF) 5 Page - Mitel Networks Corporation

Part # MT8809AP
Description  ISO-CMOS 8 x 8 Analog Switch Array
PDF  6 Pages
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Manufacturer  MITEL [Mitel Networks Corporation]
Direct Link  http://www.mitel.com
Logo MITEL - Mitel Networks Corporation

MT8809AP Datasheet(HTML) 5 Page - Mitel Networks Corporation

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ISO-CMOS
MT8809
3-25
† Timing is over recommended temperature range. See Fig. 3 for control and I/O timing details.
‡ Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
Crosstalk measurements are for Plastic DIPS only, crosstalk values for PLCC packages are approximately 5dB better.
† Timing is over recommended temperature range.
See Fig. 3 for control and I/O timing details.
Digital Input rise time (tr) and fall time (tf) = 5ns.
‡ Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
Q Refer to Appendix, Fig. A.7 for test circuit.
AC Electrical Characteristics† - Crosspoint Performance- V
DC is the external DC offset at the analog I/O pins.
Voltages are with respect to VDD=5V, VDC=0V, VSS=-7V, unless otherwise stated.
Characteristics
Sym
Min
Typ‡
Max
Units
Test Conditions
1
Switch I/O Capacitance
CS
20
pF
f=1 MHz
2
Feedthrough Capacitance
CF
0.2
pF
f=1 MHz
3
Frequency Response
Channel “ON”
20LOG(VOUT/VXi)=-3dB
F3dB
45
MHz
Switch is “ON”; VINA = 2Vpp
sinewave; RL = 1kΩ
See Appendix, Fig. A.3
4
Total Harmonic Distortion
(See G.5, G.6 in Appendix)
THD
0.01
%
Switch is “ON”; VINA = 2Vpp
sinewave f= 1kHz; RL=1kΩ
5
Feedthrough
Channel “OFF”
Feed.=20LOG (VOUT/VXi)
(See G.8 in Appendix)
FDT
-95
dB
All Switches “OFF”; VINA=
2Vpp sinewave f= 1kHz;
RL= 1kΩ.
See Appendix, Fig. A.4
6
Crosstalk between any two
channels for switches Xi-Yi and
Xj-Yj.
Xtalk=20LOG (VYj/VXi).
(See G.7 in Appendix).
Xtalk
-45
dB
VINA=2Vpp sinewave
f= 10MHz; RL = 75Ω.
-90
dB
VINA=2Vpp sinewave
f= 10kHz; RL = 600Ω.
-85
dB
VINA=2Vpp sinewave
f= 10kHz; RL = 1kΩ.
-80
dB
VINA=2Vpp sinewave
f= 1kHz; RL = 10kΩ.
Refer to Appendix, Fig. A.5
for test circuit.
7
Propagation delay through
switch
tPS
30
ns
RL=1kΩ; CL=50pF
AC Electrical Characteristics† - Control and I/O Timings- V
DC is the external DC offset applied at the analog
I/O pins. Voltages are with respect to VDD=5V, VDC=0V , VSS=-7V, unless otherwise stated.
Characteristics
Sym
Min
Typ‡
Max
Units
Test Conditions
1
Control Input crosstalk to switch
(for CS, DATA, STROBE,
Address)
CXtalk
30
mVpp
VIN=3V+VDC squarewave;
RIN=1kΩ, RL=1kΩ.
See Appendix, Fig. A.6
2
Digital Input Capacitance
CDI
10
pF
f=1MHz
3
Switching Frequency
FO
20
MHz
4
Setup Time DATA to STROBE
tDS
10
ns
RL= 1kΩ, CL=50pF Q
5
Hold Time DATA to STROBE
tDH
10
ns
RL= 1kΩ, CL=50pF Q
6
Setup Time Address to STROBE
tAS
10
ns
RL= 1kΩ, CL=50pF Q
7
Hold Time Address to STROBE
tAH
10
ns
RL= 1kΩ, CL=50pF Q
8
Setup Time CS to STROBE
tCSS
10
ns
RL= 1kΩ, CL=50pF Q
9
Hold Time CS to STROBE
tCSH
10
ns
RL= 1kΩ, CL=50pF Q
10
STROBE Pulse Width
tSPW
20
ns
RL= 1kΩ, CL=50pF Q
11
RESET Pulse Width
tRPW
40
ns
RL= 1kΩ, CL=50pF Q
12
STROBE to Switch Status Delay
tS
40
100
ns
RL= 1kΩ, CL=50pF Q
13
DATA to Switch Status Delay
tD
50
100
ns
RL= 1kΩ, CL=50pF Q
14
RESET to Switch Status Delay
tR
35
100
ns
RL= 1kΩ, CL=50pF Q



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