SM5842 datasheet(12/23 Pages) NPC

12 / 23 page

SM5842AP/APT

NIPPON PRECISION CIRCUITS—12

FUNCTIONAL DESCRIPTION

The basic arithmetic block is shown in ﬁgure 1, and

the function of each block is described in the follow-

ing sections.

8-times Oversampling (Interpolation)

The interpolation arithmetic block is comprised of 3

cascaded, 2-times FIR interpolation ﬁlters, as shown

in ﬁgure 1.

The input signal is sampled at rate fs, and then 8-

times oversampling data is output. Sampling noise in

the 0.5465fs to 7.4535fs stopband is removed by the

interpolation ﬁlter.

Digital Deemphasis

The digital deemphasis ﬁlter has the same construc-

tion as analog ﬁlters. It is implemented as an IIR ﬁl-

ter to faithfully reproduce the gain and phase

characteristics of standard analog deemphasis ﬁlters.

The three sets of ﬁlter coefﬁcients for the three fs =

32.0/44.1/48.0

kHz

sampling

frequencies

are

selected by FSEL1 and FSEL2 when the sampling

frequency is speciﬁed, as shown in table 1. Indepen-

dent deemphasis for the left and right channel is con-

trolled independently by DEMPL and DEMPR,

respectively. Digital deemphasis is ON when

DEMPL/DEMPR

HIGH,

and

OFF

when

DEMPL/DEMPR is LOW.

Figure 1. Arithmetic block diagram

Input

2fs

2-times interpolator

2nd FIR, 29-tap

4fs

Deemphasis IIR filter

Deemphasis ON

4fs

Soft mute

4fs

8fs

Output

Deemphasis OFF

2-times interpolator

3rd FIR, 17-tap

2-times interpolator

1st FIR, 169-tap

Table 1. Sampling frequency select

FSEL1

FSEL2

Sampling frequency (fs)

LOW

44.1 kHz

LOW

HIGH

48 kHz

HIGH

LOW

Invalid setting

HIGH

32 kHz

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