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SM5842 Datasheet(PDF) 17 Page - Nippon Precision Circuits Inc |
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SM5842 Datasheet(HTML) 17 Page - Nippon Precision Circuits Inc |
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17 / 23 page ![]() SM5842AP/APT NIPPON PRECISION CIRCUITS—17 TIMING DIAGRAMS Input Timing Examples (DIN, BCKI, LRCI) INF1N = LOW, IW1N = IW2N = HIGH Figure 4. LR alternating, trailing data, 16-bit input INF1N HIGH, INF2N = LOW. Data following LSB is ignored. Requires minimum 24 BCKI clock pulses. Figure 5. LR alternating, leading data, 24-bit input INF1N = INF2N = HIGH. Data following LSB is ignored. Requires minimum 24 BCKI clock pulses. Figure 6. LR simultaneous, leading data, 20-bit input 1 2 14 15 16 1 2 14 15 16 DI BCKI LRCI (MSB) (LSB) (MSB) (LSB) Lch DATA Rch DATA 1 / fs 23 24 DIL BCKI LRCI (MSB) (LSB) (MSB) (LSB) Lch DATA Rch DATA 1 / fs 12 3 23 24 12 3 1 DIR DIL BCKI LRCI (MSB) (LSB) (LSB) Lch DATA 1 / fs 12 3 1 DIR 45 6 23 24 123 1 4 5 6 23 24 Rch DATA (MSB) |
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