Preliminary Information

MT90210

2-165

† DC Electrical Characteristics are over recommended operating conditions unless otherwise stated.

* Typical figures are at 25

Characteristics

Sym

Min

Typ*

Max

Units

Test Conditions

1

SCLK, C16 Period

2.048 Mb/s (4.096 MHz)

4.096 Mb/s (8.192 MHz)

8.192 Mb/s (16.384 MHz)

244

122

60

ns

ns

ns

2

SCLK, C16 Pulse Width High

2.048 Mb/s

4.096 Mb/s

8.192 Mb/s

122

60

30

ns

ns

ns

3

SCLK, C16 Pulse Width Low

2.048 Mb/s

4.096 Mb/s

8.192 Mb/s

122

60

30

ns

ns

ns

4

SCLK rise/fall time

5ns

5

HC4 hold related to C16

3ns

6

HC4 period

244

ns

7

HC4 pulse low

122

ns

8

HC4 pulse high

122

ns

9

Frame Pulse Setup (ST-BUS)

0ns

10 Frame Pulse Hold (ST-BUS)

10

ns

11 Frame pulse width in modes 1,2,3

2.048 Mb/s

4.096 Mb/s

8.192 Mb/s

244

122

60

ns

ns

ns

12 Frame pulse width in modes 4,5

244

ns

13 S0-23 delay from active to High-Z

2.048 Mb/s, 4.096 Mb/s, 8.192 Mb/s

30

ns

14 S0-23 delay from High-Z to active

2.048 Mb/s, 4.096 Mb/s, 8.192 Mb/s

30

ns

15 S0-23 Delay (high and low)

from CLK falling (ST-BUS mode)

2.048 Mb/s, 4.096 Mb/s, 8.192 Mb/s

30

ns

16 S0-23 Set-up Time

before CLK rising (ST-BUS mode)

0

ns

17 S0-23 Hold Time

from CLK rising (ST-BUS mode)

10

ns

18 CKout output delay from SCLK

5ns