LM99

SNIS129D – JANUARY 2003 – REVISED MARCH 2013

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Table 17. Offset Register Settings for Specific Devices

Processor Family

Offset Register Settings

ΔT, °C

Register 11h

Register 12h

NVIDIA GeForceFX Graphics Processor

default

default

default

Intel Pentium 4 Processor

+2.625

0000 0010

1010 0000

Intel Pentium 3 Processor

+2.375

0000 0010

0110 0000

PCB LAYOUT FOR MINIMIZING NOISE

Figure 16. Ideal Diode Trace Layout

In a noisy environment, such as a processor mother board, layout considerations are very critical. Noise induced

on traces running between the remote temperature diode sensor and the LM99 can cause temperature

conversion errors. Keep in mind that the signal level the LM99 is trying to measure is in microvolts. The following

guidelines should be followed:

nF capacitor as close as possible to the LM99's D+ and D

− pins. Make sure the traces to the 2.2 nF

capacitor are matched.

2. Ideally, the LM99 should be placed within 10 cm of the Processor diode pins with the traces being as

straight, short and identical as possible. Trace resistance of 1

Ω can cause as much as 1°C of error. This

error can be compensated by using the Remote Temperature Offset Registers, since the value placed in

these registers will automatically be subtracted from or added to the remote temperature reading.

3. Diode traces should be surrounded by a GND guard ring to either side, above and below if possible. This

GND guard should not be between the D+ and D

− lines. In the event that noise does couple to the diode

lines it would be ideal if it is coupled common mode. That is equally to the D+ and D

− lines.

4. Avoid routing diode traces in close proximity to power supply switching or filtering inductors.

5. Avoid running diode traces close to or parallel to high speed digital and bus lines. Diode traces should be

kept at least 2 cm apart from the high speed digital traces.

6. If it is necessary to cross high speed digital traces, the diode traces and the high speed digital traces should

cross at a 90 degree angle.

7. The ideal place to connect the LM99's GND pin is as close as possible to the Processors GND associated

with the sense diode.

8. Leakage current between D+ and GND should be kept to a minimum. One nano-ampere of leakage can

cause as much as 1°C of error in the diode temperature reading. Keeping the printed circuit board as clean

as possible will minimize leakage current.

Noise coupling into the digital lines greater than 400 mVp-p (typical hysteresis) and undershoot less than 500 mV

below GND, may prevent successful SMBus communication with the LM99. SMBus no acknowledge is the most

common symptom, causing unnecessary traffic on the bus. Although the SMBus maximum frequency of

communication is rather low (100 kHz max), care still needs to be taken to ensure proper termination within a

system with multiple parts on the bus and long printed circuit board traces. An RC lowpass filter with a 3 dB

corner frequency of about 40 MHz is included on the LM99's SMBCLK input. Additional resistance can be added

in series with the SMBData and SMBCLK lines to further help filter noise and ringing. Minimize noise coupling by

keeping digital traces out of switching power supply areas as well as ensuring that digital lines containing high

speed data communications cross at right angles to the SMBData and SMBCLK lines.

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