100355

Low Power Quad Multiplexer/Latch

General Description

The 100355 contains four transparent latches, each of which

can accept and store data from two sources. When both En-

able (E

is controlled by the Select (S

ating Mode table. In addition to routing data from either D

D

where the latch is transparent (both Enables are LOW) and

can steer a HIGH signal from either D

The Select inputs can be tied together for applications re-

quiring only that data be steered from either D

positive-going signal on either Enable input latches the out-

puts. A HIGH signal on the Master Reset (MR) input over-

rides all the other inputs and forces the Q outputs LOW. All

inputs have 50 k

Ω pulldown resistors.

Features

n Greater than 40% power reduction of the 100155

n 2000V ESD protection

n Pin/function compatible with 100155

n Voltage compensated operating range = −4.2V to −5.7V

n Standard Microcircuit Drawing

(SMD) 5962-9165401

Logic Symbol

Pin Names

Description

E

Enable Inputs (Active LOW)

S

Select Inputs

MR

Master Reset

D

Data Inputs

Q

Data Outputs

Q

Complementary Data Outputs

Connection Diagrams

DS100294-1

24-Pin DIP

DS100294-2

24-Pin Quad Cerpak

DS100294-3

August 1998

© 1998 National Semiconductor Corporation

DS100294

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