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Z80C3010VSC Datasheet(PDF) 52 Page - Zilog, Inc. |
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Z80C3010VSC Datasheet(HTML) 52 Page - Zilog, Inc. |
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52 / 96 page  =&=&&026 6&& 6HULDO &RPPXQLFDWLRQV &RQWUROOHU 36 )XQFWLRQDO'HVFULSWLRQ )LJXUH :ULWH5HJLVWHU%LW)XQFWLRQV D7 D6 D5 D4 D3 D2 D1 D0 Write Register 6 Sync7 Sync1 Sync7 Sync3 ADR7 ADR7 Sync6 Sync0 Sync6 Sync2 ADR6 ADR6 Sync5 Sync5 Sync5 Sync1 ADR5 ADR5 Sync4 Sync4 Sync4 Sync0 ADR4 ADR4 Sync3 Sync3 Sync3 1 x ADR3 Sync2 Sync2 Sync2 1 x ADR2 Sync1 Sync1 Sync1 1 x ADR1 Sync0 Sync0 Sync0 1 x ADR0 Monosync, 8 Bits Monosync, 6 Bits Bisync, 16 Bits Bisync, 12 Bits SDLC SDLC (Address Range) D7 D6 D5 D4 D3 D2 D1 D0 Write Register 7 Sync7 Sync5 Sync15 Sync11 Monosync, 8 Bits Monosync, 6 Bits Bisync, 16 Bits Bisync, 12 Bits SDLC 0 Sync6 Sync4 Sync14 Sync10 1 Sync5 Sync3 Sync13 Sync9 1 Sync4 Sync2 Sync12 Sync8 1 Sync3 Sync1 Sync11 Sync7 1 Sync2 Sync0 Sync10 Sync6 1 Sync1 x Sync9 Sync5 1 Sync0 x Sync8 Sync4 0 D7 D6 D5 D4 D3 D2 D1 D0 WR 7’ Prime (85C30 only) Auto Tx Flag Auto EOM Reset Auto RTS Deactivation Force TxD High DTR/REQ Fast Mode Complete CRC Reception Extended Read Enable Reserved (Program as 0) |
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