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Z80C3010VSC Datasheet(PDF) 53 Page - Zilog, Inc.

Part # Z80C3010VSC
Description  CMOS SCC SERIAL COMMUNICATIONS CONTROLLER
PDF  96 Pages
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Manufacturer  ZILOG [Zilog, Inc.]
Direct Link  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

Z80C3010VSC Datasheet(HTML) 53 Page - Zilog, Inc.

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0
0
0
0
1
1
1
1
D7 D6 D5 D4 D3 D2 D1 D0
Write Register 9
No Reset
Channel Reset B
Channel Reset A
Force Hardware Reset
VIS
NV
DLC
MIE
Status High/Status Low
Software INTACK Enable
D7 D6 D5 D4 D3 D2 D1 D0
Write Register 9
0
0
0
0
1
1
1
1
NRZ
NRZI
FM1 (Transition = 1)
FM1 (Transition = 0)
CRC Preset I/O
Go Active on Poll
Mark/Flag Idle
Abort/Flag on Underrun
Loop Mode
6-Bit/8-Bit Sync
D7 D6 D5 D4 D3 D2 D1 D0
Write Register 11
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TRxC Out = Xtal Output
TRxC Out = Transmit Clock
TRxC Out = BR Generator Output
TRxC Out = DPLL Output
TRxC O/I
Transmit Clock = RTxC Pin
Transmit Clock = TRxC Pin
Transmit Clock = BR Generator Output
Transmit Clock = DPLL Output
Receive Clock = RTxC Pin
Receive Clock = TRxC Pin
Receive Clock = BR Generator Output
Receive Clock = DPLL Output
RTxC Xtal/No Xtal
D7 D6 D5 D4 D3 D2 D1 D0
Write Register 9
TC0
TC1
TC2
TC3
TC4
TC5
TC6
TC7
Lower Byte of
Time Constant
Upper Byte of
Time Constant
D7 D6 D5 D4 D3 D2 D1 D0
Write Register 13
TC8
TC9
TC10
TC11
TC12
TC13
TC14
TC15
D7 D6 D5 D4 D3 D2 D1 D0
Write Register 14
BR Generator Enable
BR Generator Source
DTR/Request Function
Auto Echo
Local Loopback
0
0
0
0
0
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
Null Command
Enter Search Mode
Reset Missing Clock
Disable DPLL
Set Source = BR Generator
Set Source = RTxC
Set FM Mode
Set NRZI Mode
D7 D6 D5 D4 D3 D2 D1 D0
Write Register 15
0
Zero Count IE
SDLC FIFO Enable
DCD IE
Sync/Hunt IE
CTS IE
Tx Underrun/EOM IE
Break/Abort IE



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