Z86C8316VSC datasheet(25/46 Pages) ZILOG

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Z86C83/C84

® MCU Microcontrollers

DS96DZ80203

FUNCTIONAL DESCRIPTION (Continued)

Counter/Timers. There are two 8-bit programmable

counter/timers (T0-T1), each driven by its own 6-bit

programmable prescaler. The T1 prescaler is driven by

internal or external clock sources; however, the T0

prescaler is driven by the internal clock only (Figure 19).

The 6-bit prescalers can divide the input frequency of the

clock source by any integer number from 1 to 64. Each

prescaler drives its counter, which decrements the value

(1 to 256) that has been loaded into the counter. When the

counter reaches the end of the count, a timer interrupt

request, IRQ4 (T0) or IRQ5 (T1), is generated.

The counters can be programmed to start, stop, restart to

continue, or restart from the initial value. The counters can

also be programmed to stop upon reaching zero (single

pass mode) or to automatically reload the initial value and

continue counting (modulo-n continuous mode).

The counters,

but not the prescalers, are read at any

time without disturbing their value or count mode. The

clock source for T1 is user-definable and is either the

internal

microprocessor

clock

divide-by-four,

external signal input through Port 3. The Timer Mode

external clock, a trigger input that can be retriggerable or

non-retriggerable, or as a gate input for the internal clock.

The counter/timers can be cascaded by connecting the T0

output to the input of T1. T

IN Mode is enabled by setting

R243 PRE1 Bit D1 to 0.

Figure 19. Counter/Timer Block Diagram

PRE0

Initial Value

Current Value

6-Bit

Down

Counter

8-bit

Down

Counter

÷16

÷4

6-Bit

Down

Counter

8-Bit

Down

Counter

PRE1

Initial Value

Current Value

÷2

Clock

Logic

IRQ4

TOUT

P36

IRQ5

Internal Data Bus

Write

Read

Internal Clock

Gated Clock

Triggered Clock

TIN P31

Write

Read

Internal Data Bus

External Clock

Internal

Clock

D0 (SMR)

÷4

÷2

OSC

D1 (SMR)

Z86C8316VSC Datasheet(PDF) 25 Page - Zilog, Inc.

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