Enhance Electronics Co.,LTD

_________________________________________________________________________________

Product Specification

4. TIMING

4.1 Signal timing drawing

Figure 2 is a reference for signal timing for main power connector signals and rails.

Figure 2. PS-OK Timing Sequence

(1)T2: Rise time (0.2ms~20ms)

(2)T3: Power good signal turn on delay time (100ms~500ms)

(3)T4: Power good signal turn off delay time (1ms min)

(4)T5: Rise time (10ms max)

4.2 .Output Transient Response

Table 13. summarizes the expected output transient step sizes for each output. The transient load slew rate

is =1.0A/us.

Table 13. DC Output Transient Step Sizes

Max.step size

Max.step size

Output

(% of rated output amps per Sec 3.2.3)

(1)

(amps)

+12 V1DC

40%

+12 V2DC

40%

+5 VDC

30%

+3.3 VDC

30%

+3.3 VDC

30%

-12 VDC

0.1A

+5 VSB

0.5A

Output voltages should remin within the remain within the regulation limits of Section 2.1,and the power

supply should stable when subjected to load transients per Table 13. from any steady

state load,including any or all of the following conditions:

(all steps occurring in the same direction)

4.3 Hold up time

When the power loss its input power, it shall maintain 16ms in regulation

limit at nominal input voltage. (AC:115V/60Hz or 230V/50Hz)

AUDIT:________李 復 新 _______CHECK:______________DESIGN:___

ENP7000 80Plus S SPEC REV: 4 0

6 OF 10

2009/2/9