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Z89393 Datasheet(PDF) 2 Page - Zilog, Inc. |
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Z89393 Datasheet(HTML) 2 Page - Zilog, Inc. |
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2 / 61 page ![]() Z89323/373/393 16-BIT DIGITAL SIGNAL PROCESSORS 2 PRELIMINARY DS95DSP0101 Q4/95 GENERAL DESCRIPTION (Continued) The Z893X3 DSP family is 100 percent source and object- code compatible with the existing Z89321/371/391 devices, providing users, who can benefit from increased integration and reduced system cost, an easy migration path from one DSP product to the next. Throughout this specification, references to the Z89323 device applies equally to the Z89373 and Z89393, unless otherwise specified. Notes: All Signals with a preceding front slash, "/", are active Low, e.g., B//W (WORD is active Low); /B/W (BYTE is active Low, only). Power connections follow conventional descriptions below: Connection Circuit Device Power V CC V DD Ground GND V SS Figure 1. Z893X3 Functional Block Diagram Program ROM/OTP 8192x16 Data RAM0 256x16 EA0-2 EXT0-15/P00-15 /DS WAIT RD//WR Data RAM1 256x16 DDATA XDATA PDATA PADDR PD0-15 PA0-15 Shifter Arithmetic Logic Unit (ALU) Program Control Unit CLKO HALT /ROMEN /RES Accumulator Port 1 P10-17 or INT2 CLKOUT SIN SOUT SK SS UI0-1 XY Multiplier P DP0-3 DP4-6 P2 P2 P1 P1 P0 P0 ADDR GEN0 ADDR GEN1 8-Bit A/D AN0 AN1 AN2 AN3 16-Bit Program I/O Port 0 8-Bit I/O CLKI /PAZ VALI AGND ANVCC VALO VSS VDD /EXTEN 8-Bit I/O Port 2 P20-27 UI2 UO0-2 INT0-1 or 16-Bit Timer, Counter 16-Bit Timer, Counter, PWM 16-Bit Timer, Counter, PWM SPI Port 3 P30-33 P34-37 4 Inputs 4 Outputs |
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