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AX88196 Datasheet(PDF) 18 Page - ASIX Electronics Corporation

Part # AX88196
Description  10/100BASE 3-in-1 Local CPU Bus Fast Ethernet Controller with Embedded SRAM
PDF  42 Pages
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Manufacturer  ASIX [ASIX Electronics Corporation]
Direct Link  http://www.asix.com.tw
Logo ASIX - ASIX Electronics Corporation

AX88196 Datasheet(HTML) 18 Page - ASIX Electronics Corporation

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AX88196
Local CPU BUS MAC Controller
ASIX ELECTRONICS CORPORATION
18
4.1 Command Register (CR) Offset 00H (Read/Write)
FIELD
NAME
DESCRIPTION
7:6
PS1,PS0 PS1,PS0 : Page Select
The two bit selects which register page is to be accessed.
PS1
PS0
0
0
page 0
0
1
page 1
5:3
RD2,RD1
,RD0
RD2,RD1,RD0 : Remote DMA Command
These three encoded bits control operation of the Remote DMA channel. RD2 could be set
to abort any Remote DMA command in process. RD2 is reset by AX88196 when a Remote
DMA has been completed. The Remote Byte Count should be cleared when a Remote DMA
has been aborted. The Remote Start Address are not restored to the starting address if the
Remote DMA is aborted.
RD2
RD1
RD0
0
0
0
Not allowed
0
0
1
Remote Read
0
1
0
Remote Write
0
1
1
Not allowed
1
X
X
Abort / Complete Remote DMA
2
TXP
TXP : Transmit Packet
This bit could be set to initiate transmission of a packet
1
START START :
This bit is used to active AX88196 operation.
0
STOP
STOP : Stop AX88196
This bit is used to stop the AX88196 operation.
4.2 Interrupt Status Register (ISR) Offset 07H (Read/Write)
FIELD
NAME
DESCRIPTION
7
RST
Reset Status :
Set when AX88196 enters reset state and cleared when a start command is issued to the
CR. Writing to this bit is no effect.
6
RDC
Remote DMA Complete
Set when remote DMA operation has been completed
5
CNT
Counter Overflow
Set when MSB of one or more of the Tally Counters has been set.
4
OVW
OVERWRITE : Set when receive buffer ring storage resources have been exhausted.
3
TXE
Transmit Error
Set when packet transmitted with one or more of the following errors
n Excessive collisions
n
FIFO Underrun
2
RXE
Receive Error
Indicates that a packet was received with one or more of the following errors
CRC error
Frame Alignment Error
FIFO Overrun
Missed Packet
1
PTX
Packet Transmitted
Indicates packet transmitted with no error
0
PRX
Packet Received
Indicates packet received with no error.



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