AX88196 datasheet(3/42 Pages) ASIX

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AX88196

Local CPU BUS MAC Controller

ASIX ELECTRONICS CORPORATION

6.4.2 Reset Timing .............................................................................................................................................26

6.4.3 ISA Bus Access Timing..............................................................................................................................27

6.4.4 80186 Type I/O Access Timing..................................................................................................................28

6.4.5 68K Type I/O Access Timing .....................................................................................................................29

6.4.6 8051 Bus Access Timing ...........................................................................................................................30

6.4.7 MII Timing................................................................................................................................................31

6.4.8 SNI Timing................................................................................................................................................32

7.0 PACKAGE INFORMATION ...........................................................................................................................33

APPENDIX A: APPLICATION NOTE.................................................................................................................34

A.1 USING CRYSTAL 25MHZ OR 20MHZ.................................................................................................................34

A.2 USING OSCILLATOR 25MHZ OR 20MHZ............................................................................................................34

A.3 USING 60MHZ OSCILLATOR/CRYSTAL..............................................................................................................34

A.4 DUAL POWER (5V AND 3.3V/3.0V) APPLICATION ..............................................................................................35

A.5 SINGLE POWER (3.3V/3.0V) APPLICATION.........................................................................................................35

A.6 DUAL POWER (5V AND 3.3V) APPLICATION WITH 3.3V PHY .............................................................................36

ERRATA OF AX88196 VERSION ED2.................................................................................................................37

DEMONSTRATION CIRCUIT : AX88196 + ETHERNET PHY + HOMEPNA 1M8 PHY ..............................38

FIGURES

FIG - 1 AX88196 BLOCK DIAGRAM ..............................................................................................................................4

FIG - 2 AX88196 PIN CONNECTION DIAGRAM...............................................................................................................5

FIG - 3 AX88196 PIN CONNECTION DIAGRAM FOR ISA BUS MODE................................................................................6

FIG - 4 AX88196 PIN CONNECTION DIAGRAM FOR 80X86 MODE ...................................................................................7

FIG - 5 AX88196 PIN CONNECTION DIAGRAM FOR MC68K MODE ................................................................................8

FIG - 6 AX88196 PIN CONNECTION DIAGRAM FOR MCS-51 MODE................................................................................9

TABLES

TAB - 1 LOCAL CPU BUS INTERFACE SIGNALS GROUP...................................................................................................11

TAB - 2 MII INTERFACE SIGNALS GROUP......................................................................................................................11

TAB - 3 EEPROM BUS INTERFACE SIGNALS GROUP......................................................................................................12

TAB - 4 SERIAL NETWORK INTERFACE PINS GROUP ......................................................................................................12

TAB - 5 STANDARD PRINTER PORT INTERFACE PINS GROUP ..........................................................................................13

TAB - 6 POWER ON CONFIGURATION SETUP PINS GROUP................................................................................................13

TAB - 7 MISCELLANEOUS PINS GROUP..........................................................................................................................14

TAB - 8 I/O ADDRESS MAPPING ..................................................................................................................................15

TAB - 9 LOCAL MEMORY MAPPING .............................................................................................................................15

TAB - 10 PAGE 0 OF MAC CORE REGISTERS MAPPING.................................................................................................16

TAB - 11 PAGE 1 OF MAC CORE REGISTERS MAPPING.................................................................................................17

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