OPA376 datasheet(21/42 Pages) TI1

21 / 42 page

Frequency (Hz)

-60

-40

-20

100

10k

100k

OPA376, OPA2376, OPA4376

www.ti.com

SBOS406G – JUNE 2007 – REVISED DECEMBER 2015

Typical Application (continued)

8.2.2 Application Curve

Figure 31. Low-Pass Filter Transfer Function

9 Power Supply Recommendations

The OPAx376 are specified for operation from 2.2 V to 5.5 V (±1.1 V to ±2.75 V); many specifications apply from

–40°C to +125°C. Parameters that can exhibit significant variance with regard to operating voltage or

temperature are presented in the Typical Characteristics.

10 Layout

10.1 Layout Guidelines

For best operational performance of the device, use good PCB layout practices, including:

•

Noise can propagate into analog circuitry through the power pins of the circuit as a whole, and the op

amp itself. Bypass capacitors can reduce the coupled noise by providing low-impedance power sources

local to the analog circuitry.

–

Connect low-ESR, 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed as

close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single-

supply applications.

•

Separate grounding for analog and digital portions of circuitry is one of the simplest and most effective

methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground

planes. A ground plane helps distribute heat, and reduces EMI noise pickup. Physically separate the

digital and analog grounds, paying attention to the flow of the ground current. For more detailed

information refer to Circuit Board Layout Techniques, SLOA089.

•

To reduce parasitic coupling, run the input traces as far away from the supply or output traces as

possible. If these traces cannot be kept separate, crossing the sensitive trace perpendicular is better than

opposed to in parallel with the noisy trace.

•

Place the external components as close to the device as possible. As shown in Figure 32, keeping RF

and RG close to the inverting input minimizes parasitic capacitance.

•

Keep the length of the input traces as short as possible. The input traces are the most sensitive part of

the circuit.

•

Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly

reduce leakage currents from nearby traces that are at different potentials.

•

Clean the PCB following board assembly for best performance.

•

Any precision-integrated circuit may experience performance shifts due to moisture ingress into the

plastic package. Following any aqueous PCB cleaning process, bake the PCB assembly to remove

moisture introduced into the device packaging during the cleaning process. A low-temperature, post-

cleaning bake at 85°C for 30 minutes is sufficient for most circumstances.

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