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TAS5731MPHPR Datasheet(PDF) 71 Page - Texas Instruments |
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TAS5731MPHPR Datasheet(HTML) 71 Page - Texas Instruments |
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71 / 81 page  0O 18.2KO ASEL/FAULT MCLK PDN SCLK LRCLK SDIN SCL SDA RESET AVDD PVDD PVDD Top Layer Ground Plane Pad to Top Layer Ground Plane Via to Bottom Ground Plane Top Layer Traces Bottom Layer Traces Via to Bottom Layer TAS5731M 220µF 10nF 0.1µF 0.1µF 220µF 10nF 10nF 1 48 10nF 2200pF (Max) 4700p 470O 47nF 4700p 470O 47nF 0.1µF 10µF 0.1µF 4.7µF 0.1µF 0.1µF 3.3pF 18O 3.3pF 18O 3.3pF 3.3pF 15µH 0.68µF 15µH 0.68µF 1KO 18O 18O Decoupling capacitors placed as close as possible of the device Several vias connecting Top and bottom ground planes for enhanced thermal performance Solid GND plane for low impedance return path Short traces on bootstrap capacitors TAS5731M www.ti.com SLOS838C – JULY 2013 – REVISED AUGUST 2015 Layout Examples (continued) Figure 74. Mono PBTL Mode Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 71 Product Folder Links: TAS5731M |
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