LMP92066PWPR datasheet(7/63 Pages) TI1

7 / 63 page

LMP92066

www.ti.com

SNAS634B – MARCH 2014 – REVISED JANUARY 2016

Electrical Characteristics (continued)

Unless otherwise noted: VDD = 5 V ±5%, VIO = 1.8 V to 3.3 V, TA = 25°C. VDDB = 5 V ±5%, VSSB = GNDA, VDACx output

range 0 V to 5 V; or VDDB = GNDA, VSSB = –5 V ±5%, VDACx output range 0 V to –5V. DAC input code range 48 to 4047.

VDACX load CL = 10 µF.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

EEPROM

Maximum EEPROM write cycles

100

DIGITAL INPUT CHARACTERISTICS (DRVEN0, DRVEN1, SDA, and SCL)

0.7 ×

VIH

Input high voltage

–25°C < TA < 120°C

VIO

0.3 ×

VIL

Input low voltage

–25°C < TA < 120°C

VIO

0.2 ×

Hysteresis

VIO

CiND

Input capacitance

DIGITAL INPUT CHARACTERISTICS (A0, A1)

0.7 ×

VIH

Input high voltage

–25°C < TA < 120°C

VIO

0.3 ×

VIL

Input low voltage

–25°C < TA < 120°C

VIO

RUP

Internal pullup resistance

RDN

Internal pulldown resistance

Max external capacitance(5)

DIGITAL OUTPUT CHARACTERISTICS (SDA)

IOUT = 4 mA, –25°C < TA < 120°C

0.4

VOL

Output low voltage

IOUT = 4 mA

0.16

Current from the supply rail through the

Open-drain output leakage current with

ILEAK

pullup resistor into the drain of the open-

±1

μA

output high(5)

drain output device, –25°C < TA < 120°C

COUT

Output capacitance

SUPPLY CURRENT SPECIFICATIONS

Normal operation(6),(7) –25°C < TA < 120°C

2.6

While executing EEPROM BURN(8)

IDD

While transferring EEPROM content to

operating memory(9)

I2C inactive, –25°C < TA < 120°C

IVIO

µA

I2C in fast mode, –25°C < TA < 120°C

3.1

IVDDB

LDMOS mode, RL = ∞, –25°C < TA < 120°C

1.5

IVSSB

GaN mode, RL = ∞, –25°C < TA < 120°C

–1.4

PWR

Power consumption, conversion mode

All output pins RL = ∞

(Conv)

(6)

The normal operation current through the VDD excludes the current supplied to the external load, and excludes the current required by

the EPPROM BURNS and TRANSFERS.

(7)

The power supply must be capable of sourcing a minimum of 50mA in order to avoid the continuous activation of the LMP92066’s

power-on-reset (POR) circuit.

(8)

During the EEPROM BURN command execution the device activates internal systems that are not active during the Normal operation.

This causes a momentary increase in supply current through the VDD pin. The duration of this temporary surge in supply current is

typically 125 ms.

(9)

During the data transfer from the EEPROM to the Operating memory there will be a momentary surge in supply current through the VDD

pin. The duration of this surge is typically 200 µs.

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