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STP12N50M2 Datasheet(PDF) 4 Page - STMicroelectronics |
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STP12N50M2 Datasheet(HTML) 4 Page - STMicroelectronics |
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4 / 13 page ![]() Electrical characteristics STP12N50M2 4/13 DocID026516 Rev 1 2 Electrical characteristics (T C = 25 °C unless otherwise specified) Table 5. On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS Drain-source breakdown voltage I D = 1 mA, V GS = 0 500 V I DSS Zero gate voltage drain current V GS = 0, V DS = 500 V 1 μA V GS = 0, V DS = 500 V, T C =125 °C 100 μA I GSS Gate-body leakage current V DS = 0, V GS = ± 25 V ±10 μA V GS(th) Gate threshold voltage V DS = V GS , I D = 250 μA 234 V R DS(on) Static drain-source on-resistance V GS = 10 V, I D = 5 A 0.325 0.38 Ω Table 6. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance V GS = 0, V DS = 100 V, f = 1 MHz - 560 - pF C oss Output capacitance - 33 - pF C rss Reverse transfer capacitance -1 - pF C oss eq. (1) 1. C oss eq. is defined as a constant equivalent capacitance giving the same charging time as C oss when V DS increases from 0 to 80% V DSS Equivalent output capacitance V GS = 0, V DS = 0 to 400 V - 125 - pF R G Intrinsic gate resistance f = 1 MHz open drain - 6.8 - Ω Q g Total gate charge V DD = 400 V, I D = 10 A, V GS = 10 V (see Figure 15) -15 - nC Q gs Gate-source charge - 3 - nC Q gd Gate-drain charge - 8.3 - nC |
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