TPIC2050 datasheet(21/68 Pages) TI1

21 / 68 page

10bit

11bit

12bit

312 KHz

625 KHz

1.25 MHz

5 MHz

one PWM cycle (312 KHz = 3.2us)

PWM duty

12bit DAC (8bit DAC + 4bit PWM DAC) output

LSB 4bit width

Write DAC

TPIC2050

www.ti.com

SLIS167 – AUGUST 2015

8.3.3 Example of 12-Bit DAC Sampling Rate for FCS/TRK/TLT

The input data is separated in the upper 8 bits and the lower 4 bits. Upper 8 bits (MSB sign 1 bit) are put into an

8-bit current DAC in every 5 MHz. The lower 4 bits are put into one bit current DAC in sequence, from the upper

to lower bit. This is a one bit DAC output with PWM in 1.25 MHz. At any PWM duty, 100%, 75%, 50%, 25% or

0% is summed in 8-bit current DAC every 1.25 MHz. Therefore, it takes 3.2 µs for all lower 4 bits to sum to the

PWM output. As a result, 12-bit data is sampled in every PWM cycle. An example of the sampling rate for

FCS/TRK/TLT is in Figure 10.

Figure 10. Example of 12-Bit DAC Conversion Time (FCS/TRK/TLT)

8.3.4 Digital Input Coding

The output voltage (current) is commanded via programming to the DAC. All of the DAC input format is 12 bit in

complement of 2's, though some DAC has a low resolution. When 12 bits data is inputted as 8-bits DAC, the

TPIC2050 recognizes four subordinate position bits (LSB) as 0. To arrange for 12-bit DAC format, the DSP

should shift 8-bit or 10-bit data to an appropriate bit position. The full scale is ±1.0 V, and the driver gain is set to

6 or 14. The output voltage (Vout) is given by the following equation:

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TPIC2050 Datasheet(PDF) 21 Page - Texas Instruments