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CSD87502Q2 Datasheet(PDF) 1 Page - Texas Instruments |
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CSD87502Q2 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 13 page ![]() VGS - Gate-to-Source Voltage (V) 0 2 4 6 8 10 12 14 16 18 20 0 10 20 30 40 50 60 70 80 D007 TC = 25°C, I D = 4 A TC = 125°C, I D = 4 A Qg - Gate Charge (nC) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 1 2 3 4 5 6 7 8 9 10 D004 ID = 4 A VDS = 15 V S1 G1 D2 D2 D1 G2 S2 D1 Drain Gate Source Drain Gate Source Product Folder Sample & Buy Technical Documents Tools & Software Support & Community CSD87502Q2 SLPS560 – DECEMBER 2015 CSD87502Q2 30 V Dual N-Channel NexFET™ Power MOSFETs 1 Features Product Summary 1 • Low On-Resistance TA = 25°C TYPICAL VALUE UNIT • Dual Independent MOSFETs VDS Drain-to-Source Voltage 30 V • Space Saving SON 2 × 2 mm Plastic Package Qg Gate Charge Total (4.5 V) 2.2 nC Qgd Gate Charge Gate to Drain 0.5 nC • Optimized for 5 V Gate Driver VGS = 3.8 V 42.0 m Ω • Avalanche Rated RDS(on) Drain-to-Source On Resistance VGS = 4.5 V 35.5 m Ω • Pb and Halogen Free VGS = 10 V 27.0 m Ω • RoHS Compliant VGS(th) Threshold Voltage 1.6 V 2 Applications . • Point-of-Load Synchronous Buck Converter for Ordering Information(1) Applications in Networking, Telecom, and DEVICE MEDIA QTY PACKAGE SHIP Computing Systems CSD87502Q2 7-Inch Reel 3000 SON 2 x 2 mm Tape and Plastic Package Reel CSD87502Q2T 7-Inch Reel 250 • Adaptor or USB Input Protection for Notebook PCs and Tablets (1) For all available packages, see the orderable addendum at the end of the data sheet. • Battery Protection Absolute Maximum Ratings 3 Description TA = 25°C VALUE UNIT The CSD87502Q2 is a 30 V, 27 m Ω N-Channel VDS Drain-to-Source Voltage 30 V device with dual independent MOSFETs in a SON 2 x VGS Gate-to-Source Voltage ±20 V 2 mm plastic package. The two FETs were designed ID Continuous Drain Current (Package limited) 5.0 A to be used in a half-bridge configuration for synchronous buck and other power supply IDM Pulsed Drain Current(1) 23 A applications. Additionally, these NexFET™ power PD Power Dissipation(2) 2.3 W MOSFETs can be used for adaptor, USB input TJ, Operating Junction Temperature, –55 to 150 °C Tstg Storage Temperature protection, and battery charging applications. The dual FETs feature low drain-to-source on-resistance Avalanche Energy, single pulse EAS 3.1 mJ ID = 7.9 A, L = 0.1 mH, RG = 25 Ω that minimizes losses and offers low component count for space-constrained applications. (1) Max RθJA = 185 °C/W, pulse duration ≤100 μs, duty cycle ≤1%. Top View and Circuit Image (2) Typical RθJA = 55 °C/W on a 1 inch 2, 2 oz. Cu pad on a 0.06 inch thick FR4 PCB. RDS(on) vs VGS Gate Charge 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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