TLE 4242 G

Data Sheet

3

Rev. 1.0, 2004-01-01

Figure 2

Pin Configuration (top view)

Table 1

Pin Definitions and Functions

Pin No.

Symbol

Function

1I

Input; block to GND directly at the IC with a 100 nF ceramic

capacitor.

2PWM

Pulse Width Modulation Input; if not needed connect to I

3ST

Status Output; open collector output, connect to external

pull-up resistor (

R

4GND

Ground

5REF

Reference Input; connect to shunt resistor.

6D

Status Delay; connect to GND via an optional capacitor to

set status reaction delay. Leave open if no ST delay is

needed.

7Q

Output

AEP01938_4242

PWM

ST

GND

17

D

REF

Ι

Q