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CLC405 Datasheet(PDF) 11 Page - Texas Instruments |
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CLC405 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 15 page ![]() OBSOLETE CLC405 www.ti.com SNOS815F – AUGUST 2000 – REVISED APRIL 2013 Figure 27. Differential Gain & Phase vs. IEX Figure 28. The value for Rpd in Figure 28 is determined by: (1) at ±5V supplies. Wideband Digital PGA As shown on the front page, the CLC405 is easily configured as a digitally controlled programmable gain amplifier. Make a PGA by configuring several amplifiers at required gains. Keep Rf near 348Ω and change Rg for each different gain. Use a TTL decoder that has enough outputs to control the selection of different gains and the buffer stage. Connect the buffer stage like the buffer on the front page. The buffer isolates each gain stage from the load and can produce a gain of zero for a gain selection of zero. Use of an inverter (7404) on the buffer disable pin to keep the buffer operational at all gains except zero. Or float the buffer disable pin for a continuous enable state. Amplitude Equalization Sending signals over coaxial cable greater than 50 meters in length will attenuate high frequency signal components. Equalizers restore the attenuated components of this signal. The circuit in Figure 29, is an op amp equalizer. The RC networks peak the response of the CLC405 at higher frequencies. This peaking restores cable-attenuated frequencies. Figure 30 shows how the equalizer actually restores a digital word through 150 meters of coaxial cable. Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: CLC405 |
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