TUSB3210PM datasheet(17/44 Pages) TI

17 / 44 page

2–5

Table 2–1. XDATA Space

DESCRIPTION

ADDRESS RANGE

FFFF

I t

l MMR

Internal MMR

↑

Internal MMR

(Memory mapped registers)

↑

(Memory mapped registers)

FF80

FF7F

EDB

(Endpoint descriptor blocks)

↑

(Endpoint descriptor blocks)

FF08

FF07

Setup packet buffer

↑

Setu

acket buffer

FF00

FEFF

512 b t

Input endpoint-0 buffer

↑

512 byte

RAM

In ut end oint 0 buffer

FEF8

RAM

FEF7

Output endpoint-0 buffer

↑

Out ut end oint 0 buffer

FEF0

FEEF

Dt bff

Data buffers

↑

Data buffers

(367 bytes)

↑

(367 bytes)

FD80

Table 2–2. Memory Mapped Registers Summary (XDATA Range = FF80

→ FFFF)

ADDRESS

DESCRIPTION

FFFF

FUNADR

FUNADR: Function address register

FFFE

USBSTA

USBSTA: USB status register

FFFD

USBMSK

USBMSK: USB interrupt mask register

FFFC

USBCTL

USBCTL: USB control register

↑

RESERVED

FFF6

VIDSTA

VIDSTA: VID/PID status register

↑

RESERVED

FFF3

I2CADR

I2CADR: I2C address register

FFF2

I2CDAI

I2CDAI: I2C data-input register

FFF1

I2CDAO

I2CDAO: I2C data-output register

FFF0

I2CSTA

I2CSTA: I2C status and control register

↑

RESERVED

FF97

PUR3

Port 3 pullup resistor register

FF96

PUR2

Port 2 pullup resistor register

FF95

PUR1

Port 1 pullup resistor register

FF94

PUR0

Port 0 pullup resistor register

FF93

WDCSR

WDCSR: Watchdog timer, control & status register

FF92

VECINT

VECINT: Vector interrupt register

TUSB3210PM Datasheet(PDF) 17 Page - Texas Instruments

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