SP6123 datasheet(12/18 Pages) SIPEX

12 / 18 page

Date: 5/25/04

SP6123 Low Voltage, Synchronous Step Down PWM Controller

VGS. For 5V input, use the RDS(ON) specified at

4.5V VGS. At the time of this publication, ven-

dors, such as Fairchild, Siliconix and Interna-

tional Rectifier, have started to specify RDS(ON)

at VGS less than 3V. This data is necessary for

designs where the MOSFETs are driven with

3.3V.

Thermal calculation must be conducted to en-

sure the MOSFET can handle the maximum

load current. The junction temperature of the

MOSFET, determined as follows, must stay

below the maximum rating.

MOSFET

(max)

where

TA(max) = maximum ambient temperature

PMOSFET(max) = maximum power dissipation of

the MOSFET

RθJA = junction to ambient thermal resistance.

RθJA of the device depends greatly on the board

layout, as well as device package. Significant

thermal improvement can be achieved in the maxi-

mum power dissipation through the proper design

of copper mounting pads on the circuit board. For

example, in a SO-8 package, placing two 0.04

square inches copper pad directly under the pack-

age, without occupying additional board space,

can increase the maximum power dissipation from

approximately 1 to 1.2W. For DPAK package,

enlarging the tap mounting pad to 1 square inches

reduces the RθJA from 96°C/W to 40°C/W.

Schottky Diode Selection

When paralleled with the bottom MOSFET, an

optional Schottky diode can improve efficiency

and reduce noise. Without this Schottky diode,

the body diode of the bottom MOSFET con-

ducts the current during the non-overlap time

when both MOSFETs are turned off. Unfortu-

nately, the body diode has high forward voltage

and reverse recovery problem. The reverse re-

covery of the body diode causes additional

switching noises when the diode turns off. The

Schottky diode alleviates this noise and addi-

tionally improves efficiency thanks to its low

forward voltage. The reverse voltage across the

diode is equal to input voltage, and the diode

must be able to handle the peak current equal to

the maximum load current.

The power dissipation of the Schottky diode is

determined by

PDIODE = 2VFIOUTTNOLFS

where

TNOL = non-overlap time between GL and GH.

VF = forward voltage of the Schottky diode.

SP6123

COMP

Figure 1. The RC network connected to the COMP pin

provides a pole and a zero to control loop.

Loop Compensation Design

The goal of loop compensation is to manipulate

loop frequency response such that its gain crosses

over 0db at a slope of -20db/dec. The SP6123

has a transconductance error amplifier and re-

quires the compensation network to be con-

nected between the COMP pin and ground, as

shown in Figure 1.

The first step of compensation design is to pick

the loop crossover frequency. High crossover

frequency is desirable for fast transient response,

but often jeopardize the system stability. Cross-

over frequency should be higher than the ESR

zero but less than 1/5 of the switching fre-

quency. The ESR zero is contributed by the ESR

associated with the output capacitors and can be

determined by

fZ(ESR) =

πCOUTRESR

Crossover frequency of 20kHz is a sound first

try if low ESR tantalum capacitors or POSCAPs

are used at the output. The next step is to calcu-

late the complex conjugate poles contributed by

the LC output filter,

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