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PI6C10807 Datasheet(PDF) 1 Page - Pericom Semiconductor Corporation |
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PI6C10807 Datasheet(HTML) 1 Page - Pericom Semiconductor Corporation |
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1 / 7 page ![]() 1 PS8862L 05/01/09 Pin Description Pin Name Description BUF_IN Input CLK [0:9] Outputs GND Ground VDD Power Pin Configuration 1 2 3 4 516 615 714 813 20 19 18 17 BUF_IN GND CLK0 VDD CLK1 GND CLK2 VDD CLK3 GND VDD CLK9 CLK8 GND CLK7 VDD CLK6 GND CLK5 CLK4 9 10 11 12 Block Diagram Features • High-speed, low-noise, non-inverting 1-10 buffer • Maximum Frequency up to 250 MHz • Low output skew < 60ps • Low duty cycle distortion < 200ps • Low propagation delay < 2.0ns • Multiple VDD, GND pins for noise reduction • 1.8V or 2.5V supply voltage • Packages (Pb-free & Green): ▫20-pin, TSSOP (L20) ▫20-pin, SSOP (H20) 1.8V/2.5V, 250MHz, 1:10 Networking Clock Buffer PI6C10807 Description The PI6C10807 is a 1.8V, or 2.5V high-speed, low-noise 1-10 non-inverting clock buffer. The key goal in designing the PI6C10807 is to target networking applications that require low- skew, low-jitter, and high-frequency clock distribution. Providing output-to-output skew as low as 60ps, the PI6C10807 is an ideal clock distribution device for synchronous systems. De- signing synchronous networking systems requires a tight level of skew from a large number of outputs. 09-0084 |
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