ADC08100 datasheet(12/19 Pages) NSC

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Specification Definitions

APERTURE (SAMPLING) DELAY is that time required after

the fall of the clock input for the sampling switch to open. The

Sample/Hold circuit effectively stops capturing the input sig-

nal and goes into the “hold” mode t

AD after the clock goes

low.

APERTURE JITTER is the variation in aperture delay from

sample to sample. Aperture jitter shows up as input noise.

BOTTOM OFFSET is the difference between the input volt-

age that just causes the output code to transition to the first

code and the negative reference voltage. Bottom Offset is

defined as E

OB =VZT –VRB, where VZT is the first code

transition input voltage. V

RB is the lower reference voltage.

Note that this is different from the normal Zero Scale Error.

CLOCK DUTY CYCLE is the ratio of the time that the clock

waveform is at a logic high to the total time of one clock

period.

DIFFERENTIAL NON-LINEARITY (DNL) is the measure of

the maximum deviation from the ideal step size of 1 LSB.

Measured at 100 MSPS with a ramp input.

EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE

BITS) is another method of specifying Signal-to-Noise and

Distortion Ratio, or SINAD. ENOB is defined as (SINAD –

1.76) / 6.02 and says that the converter is equivalent to a

perfect ADC of this (ENOB) number of bits.

FULL POWER BANDWIDTH is a measure of the frequency

at which the reconstructed output fundamental drops 3 dB

below its low frequency value for a full scale input. The test

is performed with f

IN equal to 100 kHz plus integer multiples

of f

CLK. The input frequency at which the output is −3 dB

relative to the low frequency input signal is the full power

bandwidth.

FULL-SCALE ERROR is a measure of how far the last code

transition is from the ideal 11⁄2 LSB below V

RT and is defined

as:

max + 1.5 LSB – VRT

where V

max is the voltage at which the transition to the

maximum (full scale) code occurs.

INTEGRAL NON-LINEARITY (INL) is a measure of the

deviation of each individual code from a line drawn from zero

scale (1⁄2 LSB below the first code transition) through positive

full scale (1⁄2 LSB above the last code transition). The devia-

tion of any given code from this straight line is measured

from the center of that code value. The end point test method

is used. Measured at 100 MSPS with a ramp input.

INTERMODULATION DISTORTION (IMD) is the creation of

additional spectral components as a result of two sinusoidal

frequencies being applied to the ADC input at the same time.

It is defined as the ratio of the power in the second and third

order intermodulation products to the power in one of the

original frequencies. IMD is usually expressed in dBFS.

MISSING CODE are those output codes that are skipped

and will never appear at the ADC outputs. These codes

cannot be reached with any input value.

OUTPUT DELAY is the time delay after the rising edge of

the input clock before the data update is present at the

output pins.

OUTPUT HOLD TIME is the length of time that the output

data is valid after the rise of the input clock.

PIPELINE DELAY (LATENCY) is the number of clock cycles

between initiation of conversion and when that data is pre-

sented to the output driver stage. New data is available at

every clock cycle, but the data lags the conversion by the

Pipeline Delay plus the Output Delay.

SIGNAL TO NOISE RATIO (SNR) is the ratio, expressed in

dB, of the rms value of the input signal at the output to the

rms value of the sum of all other spectral components below

one-half the sampling frequency, not including harmonics or

dc.

SIGNAL TO NOISE PLUS DISTORTION (S/(N+D) or

SINAD) is the ratio, expressed in dB, of the rms value of the

input signal at the output to the rms value of all of the other

spectral components below half the clock frequency, includ-

ing harmonics but excluding dc.

SPURIOUS FREE DYNAMIC RANGE (SFDR) is the differ-

ence, expressed in dB, between the rms values of the input

signal at the output and the peak spurious signal, where a

spurious signal is any signal present in the output spectrum

that is not present at the input.

TOTAL HARMONIC DISTORTION (THD) is the ratio, ex-

pressed in dB, of the total of the first nine harmonic levels at

the output to the level of the fundamental at the output. THD

is calculated as

where F

1 is the RMS power of the fundamental (input)

frequency and f

2 through f10 is the power in the first 9

harmonics in the output spectrum.

ZERO SCALE OFFSET ERROR is the error in the input

voltage required to cause the first code transition. It is de-

fined as

OFF =VZT −VRB

where V

ZT is the first code transition input voltage.

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