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PI6CFGL201B

RevB

03/16/16

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PI6CFGL201B

2-Output Low Power PCIE Gen 1-2-3 Clock Generator

C1

27pF

Crystal�(C

C2

27pF

XTAL_IN

XTAL_OUT

SaRonix-eCera

FL2500047

Application Notes

Crystal circuit connection

The following diagram shows crystal circuit connection with a parallel crystal. For the CL=18pF crystal, it is suggested to use C1=

27pF, C2= 27pF. C1 and C2 can be adjusted to fine tune to the target ppm of crystal oscillator according to different board layouts.

Crystal Oscillator Circuit

X1

X2

Cb

C1

C2

Cj

Rd

Rf

Cb

Pseudo

sine

Cj

CL= crystal spec. loading cap.

Cj = chip in/output cap. (3~5pF)

Cb = PCB trace/via cap. (2~4pF)

C1,2 = load cap. components

Rd = drive level res. (100Ω)

ASIC

Final choose/trim C1=C2=2 *CL - (Cb +Cj) for the target +/-ppm

Example: C1=C2=2*(18pF) – (4pF+5pF)=27pF

Thermal Characteristics

Symbol

Parameters

Min.

Type

Max.

Units

θJA

Thermal Resistance Junction to Ambient

54.4

o

C/W

θJC

Thermal Resistance Junction to Case

40.8

o

C/W

15-0134