FM25V40-GC datasheet(13/23 Pages) CYPRESS

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PRELIMINARY

FM25V40

Document Number: 001-87288 Rev. *A

Page 13 of 23

Maximum Ratings

Exceeding maximum ratings may shorten the useful life of the

device. These user guidelines are not tested.

Storage temperature ................................ –55

C to +125 C

Maximum junction temperature ..................................... TBD

Supply voltage on VDD relative to VSS .........–1.0 V to +4.5 V

Input voltage ........... –1.0 V to +4.5 V and VIN < VDD + 1.0 V

DC voltage applied to outputs

in High-Z state .................................... –0.5 V to VDD + 0.5 V

Transient voltage (< 20 ns) on

any pin to ground potential ................. –2.0 V to VDD + 2.0 V

Package power dissipation

capability (TA = 25 °C) ................................................. 1.0 W

Surface mount lead soldering

temperature (3 seconds) ......................................... +260

C

DC output current (1 output at a time, 1s duration) ....... TBD

Electrostatic Discharge Voltage

Human Body Model (JEDEC Std JESD22-A114-B) .............. TBD

Charged Device Model (JEDEC Std JESD22-C101-A) .......... TBD

Machine Model (JEDEC Std JESD22-A115-A)........................ TBD

Latch-up current ......................................................... > TBD

Operating Range

Range

Ambient Temperature (TA)

VDD

Commercial

–0

C to +70 C

2.0 V to 3.6 V

DC Electrical Characteristics

Over the Operating Range

Parameter

Description

Test Conditions

Min

Typ[3]

Max

Unit

VDD

Power supply

2.0

3.3

3.6

IDD

VDD supply current

SCK

toggling

between

VDD – 0.2 V and VSS,

other inputs

VSS or VDD – 0.2 V.

SO = Open

fSCK = 1 MHz;

–

0.3

fSCK = 40 MHz;

–

1.5

ISB

VDD standby current

CS = VDD. All other

inputs VSS or VDD.

TA = 25 C

–

120

150

A

TA = 70 C–

–

240

A

IZZ

Sleep mode current

CS = VDD.

All other inputs VSS or

VDD.

TA = 25 C

–35

A

TA = 70 C

––7

A

ILI

Input leakage current

VSS < VIN < VDD

––

±1

A

ILO

Output leakage current

VSS < VOUT < VDD

––

±1

A

VIH

Input HIGH voltage

0.7 × VDD

–VDD + 0.3

VIL

Input LOW voltage

– 0.3

–

0.3 × VDD

VOH1

Output HIGH voltage

IOH = –1 mA, VDD = 2.7 V.

2.4

–

VOH2

Output HIGH voltage

IOH = –100 AVDD – 0.2

–

VOL1

Output LOW voltage

IOL = 2 mA, VDD = 2.7 V

–

0.4

VOL2

Output LOW voltage

IOL = 150 A–

–

0.2

Note

3. Typical values are at 25 °C, VDD = VDD (typ). Not 100% tested.

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