CLC5665IM datasheet(4/8 Pages) NSC

4 / 8 page

http://www.national.com

The CLC5665 is a general purpose current-feedback

amplifier for use in a variety of small- and large-signal

applications. Use the feedback resistor to fine tune the

gain flatness and -3dB bandwidth for any gain setting.

National provides information for the performance at a

gain of +2 for small and large signal bandwidths. The

plots show feedback resistor values for selected gains.

Gain

Use the following equations to set the CLC5665’s non-

inverting or inverting gain:

Choose the resistor values for non-inverting or inverting

gain by the following steps.

Figure 1: Component Identification

1) Select the recommended feedback resistor Rf.

2) Choose the value of Rg to set gain.

3) Select Rs to set the circuit output impedance.

4) Select Rin for input impedance and input bias.

High Gains

Current feedback closed-loop bandwidth is independent

of gain-bandwidth-product for small gain changes. For

larger gain changes the optimum feedback register Rf is

derived by the following:

Rf = 724Ω – 60Ω • (Av)

As gain is increased, the feedback resistor allows band-

width to be held constant over a wide gain range. For a

more complete explanation refer to application note OA-25:

Stability Analysis of Current-Feedback Amplifiers.

Resistors have varying parasitics that affect circuit

performance in high-speed design. For best results, use

leaded metal-film resistors or surface mount resistors. A

SPICE model for the CLC5665 is available to simulate

overall circuit performance.

Enable/Disable Function

The CLC5665 amplifier features an enable/disable

function that changes the output and inverting input from

low to high impedance. The pin 8 enable/disable logic

levels are as follows:

VCC

±15V

±5V

Enable

>12.7V

>2.7V

Disable

<10.0V

<0.8V

The amplifier is enabled with pin 8 left open due to the

Ω pull-up resistor, shown in Figure 2.

Figure 2: Pin 8 Equivalent Disable Circuit

Open-collector or CMOS interfaces are recommended to

drive pin 8. The turn-on and off time depends on the

speed of the digital interface.

The equivalent output impedance when disabled is

shown in Figure 3. With Rg connected to ground, the sum

of Rf and Rg dominates and reduces the disabled output

impedance. To raise the output impedance in the dis-

abled state, connect the CLC5665 as a unity-gain

voltage follower by removing Rg. Current-feedback

op-amps need the recommended Rf in a unity-gain

follower circuit. For high density circuit layouts consider

using the dual CLC431 (with disable) or the dual CLC432

(without disable).

Figure 3: Equivalent Disabled Output Impedance

Non Inverting Gain

Inverting Gain

-R

−=

Rin

CLC5665

Vin

To CLC5665

Bias network

Ω

+Vcc

Pin 8 DISABLE

Ω

-Vcc

Equivalent Impedance

in Disable

Vout

Vin

300k

Ω

8pF

Frequency (MHz)

100

10k

100k

CLC5665 Design Considerations

CLC5665IM Datasheet(PDF) 4 Page - National Semiconductor (TI)

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