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COP820 Datasheet(PDF) 15 Page - National Semiconductor (TI) |
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COP820 Datasheet(HTML) 15 Page - National Semiconductor (TI) |
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15 / 35 page ![]() Reset (Continued) The user must set the BUSY flag immediately upon entering the Slave mode. This will ensure that all data bits sent by the Master will be shifted properly. After eight clock pulses the BUSY flag will be cleared and the sequence may be re- peated. (See Figure 7). TABLE 5. G4 G5 G4 G5 G6 Config. Config. Fun. Fun. Fun. Operation Bit Bit 1 1 SO Int. SK SI MICROWIRE Master 0 1 TRI-STATE Int. SK SI MICROWIRE Master 1 0 SO Ext. SK SI MICROWIRE Slave 0 0 TRI-STATE Ext. SK SI MICROWIRE Slave Timer/Counter The device has a powerful 16-bit timer with an associated 16-bit register enabling it to perform extensive timer func- tions. The timer T1 and its register R1 are each organized as two 8-bit read/write registers. Control bits in the register CN- TRL allow the timer to be started and stopped under soft- ware control. The timer-register pair can be operated in one of three possible modes. Table 6 details various timer oper- ating modes and their requisite control settings. MODE 1. TIMER WITH AUTO-LOAD REGISTER In this mode of operation, the timer T1 counts down at the in- struction cycle rate. Upon underflow the value in the register R1 gets automatically reloaded into the timer which contin- ues to count down. The timer underflow can be programmed to interrupt the microcontroller. A bit in the control register CNTRL enables the TIO (G3) pin to toggle upon timer under- flows. This allows the generation of square-wave outputs or pulse width modulated outputs under software control ( Figure 8). MODE 2. EXTERNAL COUNTER In this mode, the timer T1 becomes a 16-bit external event counter. The counter counts down upon an edge on the TIO pin. Control bits in the register CNTRL program the counter to decrement either on a positive edge or on a negative edge. Upon underflow the contents of the register R1 are au- tomatically copied into the counter. The underflow can also be programmed to generate an interrupt ( Figure 9). TABLE 6. Timer Operating Modes CNTRL Timer Bits Operation Mode T Interrupt Counts 765 On 0 0 0 External Counter w/Auto-Load Reg. Timer Underflow TIO Pos. Edge 0 0 1 External Counter w/Auto-Load Reg. Timer Underflow TIO Neg. Edge 0 1 0 Not Allowed Not Allowed Not Allowed 0 1 1 Not Allowed Not Allowed Not Allowed 1 0 0 Timer w/Auto-Load Reg. Timer Underflow t c 1 0 1 Timer w/Auto-Load Reg./Toggle TIO Out Timer Underflow t c 1 1 0 Timer w/Capture Register TIO Pos. Edge t c 1 1 1 Timer w/Capture Register TIO Neg. Edge t c DS011208-24 FIGURE 8. Timer/Counter Auto Reload Mode Block Diagram www.national.com 15 |
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