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COP8SE Datasheet(PDF) 18 Page - National Semiconductor (TI) |
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COP8SE Datasheet(HTML) 18 Page - National Semiconductor (TI) |
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18 / 47 page  6.0 Timers (Continued) 6.3 TIMER CONTROL FLAGS The Timer T1 control bits and their functions are summarized below. T1C3 Timer mode control T1C2 Timer mode control T1C1 Timer mode control T1C0 Timer Start/Stop control in Modes 1 and 2 (Pro- cessor Independent PWM and External Event Counter), where 1 = Start, 0 = Stop Timer Under- flow Interrupt Pending Flag in Mode 3 (Input Cap- ture) T1PNDA Timer Interrupt Pending Flag T1ENA Timer Interrupt Enable Flag 1 = Timer Interrupt Enabled 0 = Timer Interrupt Disabled T1PNDB Timer Interrupt Pending Flag T1ENB Timer Interrupt Enable Flag 1 = Timer Interrupt Enabled 0 = Timer Interrupt Disabled The timer mode control bits (T1C3, T1C2 and T1C1) are detailed below: Mode T1C3 T1C2 T1C1 Description Interrupt A Source Interrupt B Source Timer Counts On 1 1 0 1 PWM: T1A Toggle Autoreload RA Autoreload RB t C 1 0 0 PWM: No T1A Toggle Autoreload RA Autoreload RB t C 2 0 0 0 External Event Counter Timer Underflow Pos. T1B Edge Pos. T1A Edge 0 0 1 External Event Counter Timer Underflow Pos. T1B Edge Pos. T1A Edge 3 0 1 0 Captures: Pos. T1A Edge Pos. T1B Edge t C T1A Pos. Edge or Timer T1B Pos. Edge Underflow 1 1 0 Captures: Pos. T1A Neg. T1B t C T1A Pos. Edge Edge or Timer Edge T1B Neg. Edge Underflow 0 1 1 Captures: Neg. T1A Neg. T1B t C T1A Neg. Edge Edge or Timer Edge T1B Neg. Edge Underflow 1 1 1 Captures: Neg. T1A Neg. T1B t C T1A Neg. Edge Edge or Timer Edge T1B Neg. Edge Underflow DS100973-48 FIGURE 14. Timer in Input Capture Mode www.national.com 18 |
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