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9531 Datasheet(PDF) 12 Page - NXP Semiconductors |
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9531 Datasheet(HTML) 12 Page - NXP Semiconductors |
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12 / 20 page ![]() Philips Semiconductors Product data PCA9531 8-bit I2C LED dimmer 2003 Nov 10 12 AC SPECIFICATIONS SYMBOL PARAMETER STANDARD MODE I2C BUS FAST MODE I2C BUS UNITS SYMBOL PARAMETER MIN MAX MIN MAX UNITS fSCL Operating frequency 0 100 0 400 kHz tBUF Bus free time between STOP and START conditions 4.7 — 1.3 — µs tHD;STA Hold time after (repeated) START condition 4.0 — 0.6 — µs tSU;STA Repeated START condition setup time 4.7 — 0.6 — µs tSU;STO Setup time for STOP condition 4.0 — 0.6 — µs tHD;DAT Data in hold time 0 — 0 — ns tVD;ACK Valid time for ACK condition2 — 600 — 600 ns tVD;DAT (L) Data out valid time3 — 600 — 600 ns tVD;DAT (H) Data out valid time3 — 1500 — 600 ns tSU;DAT Data setup time 250 — 100 — ns tLOW Clock LOW period 4.7 — 1.3 — µs tHIGH Clock HIGH period 4.0 — 0.6 — µs tF Clock/Data fall time — 300 20 + 0.1 Cb1 300 ns tR Clock/Data rise time — 1000 20 + 0.1 Cb1 300 ns tSP Pulse width of spikes that must be suppressed by the input filters — 50 — 50 ns Port Timing tPV Output data valid — 200 — 200 ns tPS Input data setup time 100 — 100 — ns tPH Input data hold time 1 — 1 — µs Reset tW Reset pulse width 6 — 6 — ns tREC Reset recovery time 0 — 0 — ns tRESET4,5 Time to reset 400 — 400 — ns NOTES: 1. Cb = total capacitance of one bus line in pF. 2. tVD;ACK = time for Acknowledgement signal from SCL low to SDA (out) low. 3. tVD;DAT = minimum time for SDA data out to be valid following SCL low. 4. Resetting the device while actively communicating on the bus may cause glitches or errant STOP conditions. 5. Upon reset, the full delay will be the sum of tRESET and the RC time constant of the SDA bus. |
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