DAC0832 datasheet(12/28 Pages) NSC

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DAC0830 Series Application Hints (Continued)

2.0 ANALOG CONSIDERATIONS

The fundamental purpose of any D to A converter is to

provide an accurate analog output quantity which is repre-

sentative of the applied digital word. In the case of the

DAC0830, the output, I

OUT1, is a current directly proportional

to the product of the applied reference voltage and the digital

input word. For application versatility, a second output,

OUT2, is provided as a current directly proportional to the

complement of the digital input. Basically:

where the digital input is the decimal (base 10) equivalent of

the applied 8-bit binary word (0 to 255), V

REF is the voltage

at pin 8 and 15 k

Ω is the nominal value of the internal

resistance, R, of the R-2R ladder network (discussed in

Section 2.1).

Several factors external to the DAC itself must be consid-

ered to maintain analog accuracy and are covered in subse-

quent sections.

2.1 The Current Switching R-2R Ladder

The analog circuitry,

Figure 6, consists of a silicon-chromium

(SiCr or Si-chrome) thin film R-2R ladder which is deposited

on the surface oxide of the monolithic chip. As a result, there

are no parasitic diode problems with the ladder (as there

may be with diffused resistors) so the reference voltage,

REF, can range −10V to +10V even if VCC for the device is

DC.

The digital input code to the DAC simply controls the position

of the SPDT current switches and steers the available ladder

current to either I

OUT1 or IOUT2 as determined by the logic

input level (“1” or “0”) respectively, as shown in

Figure 6. The

MOS switches operate in the current mode with a small

voltage drop across them and can therefore switch currents

of either polarity. This is the basis for the 4-quadrant multi-

plying feature of this DAC.

2.2 Basic Unipolar Output Voltage

To maintain linearity of output current with changes in the

applied digital code, it is important that the voltages at both

of the current output pins be as near ground potential (0V

DC)

as possible. With V

REF=+10V every millivolt appearing at

either I

OUT1 or IOUT2 will cause a 0.01% linearity error. In

most applications this output current is converted to a volt-

age by using an op amp as shown in

Figure 7.

The inverting input of the op amp is a “virtual ground” created

by the feedback from its output through the internal 15 k

Ω

resistor, R

fb. All of the output current (determined by the

digital input and the reference voltage) will flow through R

to the output of the amplifier. Two-quadrant operation can be

obtained by reversing the polarity of V

REF thus causing IOUT1

to flow into the DAC and be sourced from the output of the

amplifier. The output voltage, in either case, is always equal

to I

OUT1xRfb and is the opposite polarity of the reference

voltage.

The reference can be either a stable DC voltage source or

an AC signal anywhere in the range from −10V to +10V. The

DAC can be thought of as a digitally controlled attenuator:

the output voltage is always less than or equal to the applied

reference voltage. The V

REF terminal of the device presents

a nominal impedance of 15 k

Ω to ground to external circuitry.

00560808

FIGURE 5. Accommodating a High Speed System

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