DAC14135PCASM datasheet(8/12 Pages) NSC

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ridden by an external bandgap reference voltage.

The

reference ground (REFLO) should always be tied to

analog ground. The REFIO pin should be bypassed to

REFLO using a 0.1

µF capacitor. For reduced noise, an

external compensation capacitor (0.1

µF) should also be

used to bypass the internal reference loop from pin

REFCOMP to AGND. Figure 3 shows the internal

voltage reference loop functional schematic.

Figure 3: Internal Voltage Loop

Functional Schematic

A reference current source (Iref) from pin FSADJ to

ground may be used to set the full scale output current

(Ifs) of the DAC14135. The full scale current is given by,

Ifs = 42.67 x Iref

Alternatively, a resistor (Rset) from FSADJ to AGND may

be used to set the full scale output current of the DAC.

Ifs (mA) = 42.67 x REFIO/Rset

The voltage at REFIO is nominally set by the internal

bandgap at 1.235V. For a full scale output current of

20mA, the value of Rset is 2.635k

Ω.

Analog Outputs

The differential analog outputs, IOUTT and IOUTF, are high

impedance current source outputs. These outputs, if

terminated into 50

Ω at 20mA full scale current, will

generate a differential voltage output at 2Vpp. The output

compliance of each of the current outputs of the

DAC14135 is -0.5V to +1.25V. The differential outputs

can be converted to a single-ended output using an RF

center-tapped transformer or a differential to single-

ended ampliﬁer. The IOUTT and IOUTF traces on the

printed circuit board should be short and matched with

adequate analog grounding nearby. One example of an

AC coupled differential to single-ended topology is shown

in Figure 4.

Figure 4: AC Coupled Differential to

Single-ended Topology

DAC14135 Grounding Information

In the DAC14135, all the grounds AGND, REFLO, DGND

and CGND are shorted together inside the package. The

purpose of having separate grounds on the printed circuit

board is to prevent digital data currents from returning

through the analog or reference grounds, and corrupting

the analog outputs. Refer to the evaluation board layout.

PMOS

mirrors

Band-

gap

1.235V

REFCOMP

REFIO

FSADJ

DAC14135

REFLO

Rset

0.1

µF

0.1

µF

Iref

IOUTT

IOUTF

DAC14135

Ω

T1-1T

100

Ω

DAC14135PCASM Datasheet(PDF) 8 Page - National Semiconductor (TI)

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