LT3430EFE datasheet(22/28 Pages) LINER

22 / 28 page

LT3430

sn3430 3430is

where, even with the tantalum output capacitor, an addi-

tional zero is required in the loop to increase phase margin

for improved transient response.

A zero can be added into the loop by placing a resistor (RC)

at the VC pin in series with the compensation capacitor, CC,

or by placing a capacitor (CFB) between the output and the

FB pin.

When using RC, the maximum value has two limitations.

First, the combination of output capacitor ESR and RC may

stop the loop rolling off altogether. Second, if the loop gain

is not rolled off sufficiently at the switching frequency,

output ripple will perturb the VC pin enough to cause

unstable duty cycle switching similar to subharmonic

oscillations. If needed, an additional capacitor (CF) can be

added across the RC/CC network from the VC pin to ground

to further suppress VC ripple voltage.

With a tantalum output capacitor, the LT3430 already

includes a resistor (RC) and filter capacitor (CF) at the VC

pin (see Figures 10 and 11) to compensate the loop over

the entire VIN range (to allow for stable pulse skipping for

high VIN-to-VOUT ratios ≥ 10). A ceramic output capacitor

can still be used with a simple adjustment to the resistor RC

for stable operation (see Ceramic Capacitors section for

stabilizing LT3430). If additional phase margin is required,

a capacitor (CFB) can be inserted between the output and

FB pin but care must be taken for high output voltage

applications. Sudden shorts to the output can create

unacceptably large negative transients on the FB pin.

APPLICATIO S I FOR ATIO

For VIN-to-VOUT ratios < 10, higher loop bandwidths are

possible by readjusting the frequency compensation com-

ponents at the VC pin.

When checking loop stability, the circuit should be oper-

ated over the application’s full voltage, current and tem-

perature range. Proper loop compensation may be obtained

by empirical methods as described in Application Notes 19

and 76.

CONVERTER WITH BACKUP OUTPUT REGULATOR

In systems with a primary and backup supply, for ex-

ample, a battery powered device with a wall adapter input,

the output of the LT3430 can be held up by the backup

supply with the LT3430 input disconnected. In this condi-

tion, the SW pin will source current into the VIN pin. If the

SHDN pin is held at ground, only the shut down current of

µA will be pulled via the SW pin from the second supply.

With the SHDN pin floating, the LT3430 will consume its

quiescent operating current of 1.5mA. The VIN pin will also

source current to any other components connected to the

input line. If this load is greater than 10mA or the input

could be shorted to ground, a series Schottky diode must

be added, as shown in Figure 12. With these safeguards,

the output can be held at voltages up to the VIN absolute

maximum rating.

1.22V

VSW

LT3430

GND

3430 F10

OUTPUT

ESR

200k

ERROR

AMPLIFIER

RLOAD

CURRENT MODE

POWER STAGE

gm = 2mho

gm =

2000

µmho

TANTALUM

ESL

CERAMIC

CFB

Figure 10. Model for Loop Response

FREQUENCY (Hz)

–20

–40

180

150

120

3430 F11

GAIN

PHASE

VIN = 42V

VOUT = 5V

ILOAD = 1A

COUT = 100µF, 10V, 0.1Ω

10k

100

100k

RC = 3.3k

CC = 22nF

CF = 220pF

Figure 11. Overall Loop Response

LT3430EFE Datasheet(PDF) 22 Page - Linear Technology

LT3430EFE Datasheet(HTML) 22 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Datasheet Download

Link URL